Circuit layouts of tamper-respondent sensors

ABSTRACT

Tamper-respondent assemblies and methods of fabrication are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes, for instance, a tamper-respondent sensor having at least one flexible layer and paired conductive lines disposed on the at least one flexible layer. The paired conductive lines form, at least in part, at least one tamper-detect network of the tamper-respondent sensor. The tamper-respondent electronic circuit structure further includes monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event. In enhanced embodiments, multiple interconnect vias electrically connect to two or more layers of paired conductive lines and are disposed in an unfolded interconnect area of the tamper-respondent sensor when the sensor is operatively positioned about an electronic component or assembly to be protected.

BACKGROUND

Many activities require secure electronic communications. To facilitate secure electronic communications, an encryption/decryption system may be implemented on an electronic assembly or printed circuit board assembly that is included in equipment connected to a communications network. Such an electronic assembly is an enticing target for malefactors since it may contain codes or keys to decrypt intercepted messages, or to encode fraudulent messages. To prevent this, an electronic assembly may be mounted in an enclosure, which is then wrapped in a security sensor and encapsulated with polyurethane resin. A security sensor may be, in one or more embodiments, a web or sheet of insulating material with circuit elements, such as closely-spaced, conductive lines fabricated on it. The circuit elements are disrupted if the sensor is torn, and the tear can be sensed in order to generate an alarm signal. The alarm signal may be conveyed to a monitor circuit in order to reveal an attack on the integrity of the assembly. The alarm signal may also trigger an erasure of encryption/decryption keys stored within the electronic assembly.

BRIEF SUMMARY

In one or more aspects, a method of fabricating a tamper-respondent assembly is provided, which includes: providing a tamper-respondent electronic circuit structure, the providing of the tamper-respondent electronic circuit structure includes: providing a tamper-respondent sensor, including providing at least one flexible layer, and providing paired conductive lines disposed on the at least one flexible layer to form, at least in part, at least one tamper-detect network of the tamper-respondent sensor; and providing monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event.

Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.

BRIEF DESCRIPTION OF THE DRAWINGS

One or more aspects of the present invention are particularly pointed out and distinctly claimed as examples in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:

FIG. 1 is a partial cut-away of one embodiment of a tamper-proof electronic package which may incorporate a tamper-respondent electronic circuit structure, in accordance with one or more aspects of the present invention;

FIG. 2 is a cross-sectional elevational view of one embodiment of a prior art, tamper-proof electronic package comprising an electronic circuit;

FIG. 3A depicts one embodiment of a tamper-respondent sensor comprising one or more flexible layers and circuit lines forming at least one tamper-detect network, in accordance with one or more aspects of the present invention;

FIG. 3B is a cross-sectional elevational view of another embodiment of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 3C is a cross-sectional elevational view of another embodiment of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 3D is a cross-sectional elevational view of a further embodiment of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 3E depicts a cross-sectional elevational view of another embodiment of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 4A is a partial depiction of one embodiment of a tamper-respondent sensor comprising a corrugated layer of flexible dielectric with circuit lines, in accordance with one or more aspects of the present invention;

FIG. 4B depicts an alternate embodiment of a tamper-respondent sensor comprising multiple corrugated layers of flexible dielectric with circuit lines, in accordance with one or more aspects of the present invention;

FIG. 5A depicts one embodiment of a tamper-respondent sensor comprising a flattened, folded layer with circuit lines, in accordance with one or more aspects of the present invention;

FIG. 5B is a partial plan view of the flattened, folded layer with circuit lines of FIG. 5A, in accordance with one or more aspects of the present invention;

FIG. 5C is a partial cross-sectional elevational view of a tamper-respondent sensor comprising a flattened, folded layer with circuit lines, and at least one other layer overlying one or both sides of the flattened, folded layer, in accordance with one or more aspects of the present invention;

FIG. 5D depicts another embodiment of the tamper-respondent sensor of FIG. 5C, further comprising a breakable layer for enhanced tamper-detection capabilities, in accordance with one or more aspects of the present invention;

FIG. 5E is a partial cross-sectional elevational view of a tamper-respondent sensor comprising a flattened, folded layer with circuit lines, and at least one other layer overlying the lower surface of the flattened, folded layer, in accordance with one or more aspects of the present invention;

FIG. 5F is a partial cross-sectional elevational view of a further embodiment of a tamper-respondent sensor comprising a flattened, folded layer with circuit lines sandwiched between two other layers overlying opposite sides of the flattened, folded layer, in accordance with one or more aspects of the present invention;

FIG. 5G depicts a partial cross-sectional elevational view of another embodiment of a tamper-respondent sensor which comprises multiple flattened, folded layers with circuit lines separated by at least one other layer in a stack of layers, in accordance with one or more aspects of the present invention;

FIG. 5H depicts a partial cross-sectional elevational view of a further embodiment of a tamper-respondent sensor comprising a stack of layers with multiple flattened, folded layers with circuit lines, and multiple other layers, for instance, multiple other flexible layers, disposed above and/or below the flattened, folded layers with circuit lines, in accordance with one or more aspects of the present invention;

FIG. 6A is a cross-sectional elevational view of a tamper-respondent assembly comprising an electronic enclosure and a tamper-respondent electronic circuit structure comprising a tamper-respondent sensor, where the tamper-respondent sensor comprises a flattened, folded layer with circuit lines that wraps around the electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 6B is a cross-sectional elevational view of a tamper-respondent assembly comprising an electronic enclosure and a tamper-respondent electronic circuit structure comprising multiple tamper-respondent sensors, where the tamper-respondent sensors comprise multiple discrete flattened, folded layers with circuit lines, wherein one flattened, folded layer along the edge or side of the enclosure wraps around and doubles over the flattened, folded layers with circuit lines located above and below the enclosure, in accordance with one or more aspects of the present invention;

FIG. 6C is an upper (or lower) plan view of one embodiment of the tamper-respondent assembly of FIG. 6B, in accordance with one or more aspects of the present invention;

FIG. 6D is a cross-sectional elevational view of a further embodiment of a tamper-respondent assembly comprising an electronic enclosure and a tamper-respondent electronic circuit structure comprising multiple tamper-respondent sensors, where the tamper-respondent sensors comprise multiple flattened, folded layers with circuit lines, and one flattened, folded layer wraps around the edge of the electronic enclosure, and the other flattened, folded layers located above and below the electronic enclosure wrap over the flattened, folded layer positioned around the edge of the electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 6E is a plan view of one embodiment of an upper (or lower) tamper-respondent sensor for use in a tamper-respondent assembly such as depicted in FIG. 6D, wherein the upper (or lower) tamper-respondent sensor is depicted by way of example only as a flattened, folded layer, in accordance with one or more aspects of the present invention;

FIG. 6F is a plan view of a further embodiment of an upper (or lower) tamper-respondent sensor for a tamper-respondent assembly such as depicted in FIG. 6D, wherein the upper (or lower) tamper-respondent sensor is depicted by way of example only as a flattened, folded layer, in accordance with one or more aspects of the present invention;

FIG. 6G is a cross-sectional elevational view of a further embodiment of a tamper-respondent assembly comprising an electronic enclosure and a tamper-respondent electronic circuit structure comprising multiple tamper-respondent sensors, where the tamper-respondent sensors comprise two flattened, folded layers with circuit lines surrounding the electronic enclosure and overlapping along the edge or side thereof, in accordance with one or more aspects of the present invention;

FIG. 7A is a plan view of one embodiment of a first tamper-respondent sensor to be interweaved with a similarly constructed, second tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 7B is a plan view of one embodiment of a tamper-respondent electronic circuit structure comprising two discrete tamper-respondent sensors, such as depicted in FIG. 7A, interweaved in a multi-sensor interweaved layer, in accordance with one or more aspects of the present invention;

FIG. 7C depicts, by way of further example, a stack of multi-sensor interweaved layers which may be employed, for instance, in association with an electronic enclosure within a tamper-respondent assembly to define a secure volume, in accordance with one or more aspects of the present invention;

FIG. 8A is a cross-sectional elevational view of one embodiment of a tamper-respondent assembly, or tamper-proof electronic package, which includes (in part) a tamper-respondent sensor embedded within a multilayer circuit board, in accordance with one or more aspects of the present invention;

FIG. 8B is a top plan view of the multilayer circuit board of FIG. 8A, depicting one embodiment of the secure volume where defined, in part, within the multilayer circuit board, in accordance with one or more aspects of the present invention;

FIG. 9 is a partial cross-sectional elevational view of a tamper-respondent assembly comprising (in part) a multilayer circuit board and embedded tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 10 depicts one embodiment of a process of fabricating a multilayer circuit board with an embedded tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 11 is a partial cross-sectional elevational view of a tamper-respondent assembly comprising an electronic enclosure and associated tamper-respondent sensor, and a multilayer circuit board with an embedded tamper-respondent sensor therein, in accordance with one or more aspects of the present invention;

FIG. 12 depicts one embodiment of a process for affixing a tamper-respondent sensor to an inside surface of an electronic enclosure, such as for use with a tamper-respondent assembly described herein with reference to FIGS. 8A-11, in accordance with one or more aspects of the present invention;

FIG. 13A depicts an underside, isometric view of one embodiment of an electronic enclosure such as depicted in FIGS. 8A, 11 & 12, and illustrating placement of an inner-sidewall tamper-respondent sensor over an inner sidewall surface of the electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 13B depicts the structure of FIG. 13A, with an inner main surface tamper-respondent sensor provided over an inner main surface of the electronic enclosure, and with the inner main surface tamper-respondent sensor shown overlapping, at least in part, the inner-sidewall tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 13C is an enlarged, corner depiction of the electronic enclosure and tamper-respondent sensors of FIG. 13B, illustrating the inner main surface tamper-respondent sensor overlying the inner-sidewall tamper-respondent sensor at an inner corner of the electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 14A depicts an underside, isometric view of one embodiment of an electronic enclosure, or electronic assembly enclosure, such as depicted in FIGS. 13A-13C, in accordance with one or more aspects of the present invention;

FIG. 14B is an enlarged view of the inner-sidewall corner of FIG. 14A, illustrating region 14B thereof, in accordance with one or more aspects of the present invention;

FIG. 15A depicts an underside, perspective view of one embodiment of a tamper-respondent assembly comprising an electronic enclosure such as depicted in FIGS. 14A-14B, in accordance with one or more aspects of the present invention;

FIG. 15B depicts an exploded view of the tamper-respondent assembly of FIG. 15A, in accordance with one or more aspects of the present invention;

FIG. 16A is an isometric view of one embodiment of an inner-sidewall tamper-respondent sensor for covering an inner sidewall surface of electronic enclosure such as depicted in FIG. 14A, in accordance with one or more aspects of the present invention;

FIG. 16B depicts an underside, isometric view of the electronic enclosure and inner-sidewall tamper-respondent sensor of FIGS. 15A & 15B, with the inner-sidewall tamper-respondent sensor shown positioned over the inner sidewall surface of the electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 16C is an enlarged depiction of the tamper-respondent assembly of FIG. 16B, illustrating region 16C thereof, in accordance with one or more aspects of the present invention;

FIG. 17A is an enlarged depiction of the inner main surface tamper-respondent sensor embodiment illustrated in FIGS. 15A & 15B, in accordance with one or more aspects of the present invention;

FIG. 17B depicts the inner main surface tamper-respondent sensor of FIG. 17A, with the corner tabs shown raised for positioning, as illustrated in FIGS. 15A & 15B, in accordance with one or more aspects of the present invention;

FIG. 17C depicts the tamper-respondent assembly of FIGS. 15A & 15B, with the inner main surface tamper-respondent sensor positioned therein, and with the security elements(s) removed, in accordance with one or more aspects of the present invention;

FIG. 18 is a perspective view of the security elements(s) illustrated in FIGS. 15A & 15B for the tamper-respondent assembly depicted, in accordance with one or more aspects of the present invention;

FIG. 19A is a plan view of another embodiment of a tamper-respondent sensor for a tamper-respondent assembly, where the tamper-respondent sensor includes paired conductive lines, and multiple interconnect vias disposed in an unfolded interconnect area, in accordance with one or more aspects of the present invention;

FIG. 19B depicts a plan view of the tamper-respondent sensor of FIG. 19A, with fold lines shown for operative positioning of the tamper-respondent sensor about a six-sided electronic enclosure, in accordance with one or more aspects of the present invention;

FIG. 20A is a schematic of one embodiment of a first set of paired conductive lines of, for instance, one layer of circuit lines of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 20B is a schematic of one embodiment of a second set of paired conductive lines of, for instance, another layer of circuit lines of a tamper-respondent sensor, in accordance with one or more aspects of the present invention;

FIG. 21A is a schematic of one embodiment of a tamper-detect network electrically connected to differential monitor circuitry disposed, for instance, within a secure volume defined by one or more tamper-respondent sensors such as described herein, in accordance with one or more aspects of the present invention;

FIG. 21B is a schematic of another embodiment of a tamper-detect network electrically connected to differential monitor circuitry disposed, for instance, within a secure volume defined by one or more tamper-respondent sensors such as described herein, in accordance with one or more aspects of the present invention;

FIG. 22A depicts the tamper-respondent assembly of FIGS. 15A & 15B, with the inner-sidewall tamper-respondent sensor and inner main surface tamper-respondent sensor positioned therein, and illustrating interconnect areas of the sensors shown disposed within the secure volume defined by the tamper-respondent assembly, in accordance with one or more aspects of the present invention;

FIG. 22B is an enlarged depiction of one embodiment of an unfolded interconnect area of an inner-sidewall tamper-respondent sensor of a tamper-respondent assembly such as depicted in FIG. 22A, in accordance with one or more aspects of the present invention; and

FIG. 22C is a partial plan view of one embodiment of an unfolded interconnect area of an inner main surface tamper-respondent sensor of a tamper-respondent assembly such as depicted in FIG. 22A, in accordance with one or more aspects of the present invention.

DETAILED DESCRIPTION

Aspects of the present invention and certain features, advantages, and details thereof, are explained more fully below with reference to the non-limiting example(s) illustrated in the accompanying drawings. Descriptions of well-known materials, fabrication tools, processing techniques, etc., are omitted so as not to unnecessarily obscure the invention in detail. It should be understood, however, that the detailed description and the specific example(s), while indicating aspects of the invention, are given by way of illustration only, and are not by way of limitation. Various substitutions, modifications, additions, and/or arrangements, within the spirit and/or scope of the underlying inventive concepts will be apparent to those skilled in the art for this disclosure. Note further that reference is made below to the drawings, which are not drawn to scale for ease of understanding, wherein the same reference numbers used throughout different figures designate the same or similar components. Also, note that numerous inventive aspects and features are disclosed herein, and unless otherwise inconsistent, each disclosed aspect or feature is combinable with any other disclosed aspect or feature as desired for a particular application, for establishing a secure volume about an electronic component or electronic assembly to be protected.

Reference is first made to FIG. 1 of the drawings, which illustrates one embodiment of an electronic assembly package 100 configured as a tamper-proof electronic assembly package for purposes of discussion. In the depicted embodiment, an electronic assembly enclosure 110 is provided containing, for instance, an electronic assembly, which in one embodiment may include a plurality of electronic components, such as an encryption and/or decryption module and associated memory. The encryption and/or decryption module may comprise security-sensitive information with, for instance, access to the information stored in the module requiring use of a variable key, and with the nature of the key being stored in the associated memory within the enclosure.

In one or more implementations, a tamper-proof electronic package such as depicted is configured or arranged to detect attempts to tamper-with or penetrate into electronic assembly enclosure 110. Accordingly, electronic assembly enclosure 110 also includes, for instance, a monitor circuit which, if tampering is detected, activates an erase circuit to erase information stored within the associated memory, as well as the encryption and/or decryption module within the communications card. These components may be mounted on, and interconnected by, a multi-layer circuit board, such as a printed circuit board or other multi-layer substrate, and be internally or externally powered via a power supply provided within the electronic assembly enclosure.

In the embodiment illustrated, and as one example only, electronic assembly enclosure 110 may be surrounded by a tamper-respondent sensor 120, an encapsulant 130, and an outer, thermally conductive enclosure 140. In one or more implementations, tamper-respondent sensor 120 may include a tamper-respondent laminate that is folded around electronic assembly enclosure 110, and encapsulant 130 may be provided in the form of a molding. Tamper-respondent sensor 120 may include various detection layers, which are monitored through, for instance, a ribbon cable by the enclosure monitor, against sudden violent attempts to penetrate enclosure 110 and damage the enclosure monitor or erase circuit, before information can be erased from the encryption module. The tamper-respondent sensor may be, for example, any such article commercially available or described in various publications and issued patents, or any enhanced article such as disclosed herein.

By way of example, tamper-respondent sensor 120 may be formed as a tamper-respondent laminate comprising a number of separate layers with, for instance, an outermost lamination-respondent layer including a matrix of, for example, diagonally-extending or sinusoidally-extending, conductive or semi-conductive lines printed onto a regular, thin insulating film. The matrix of lines forms a number of continuous conductors which would be broken if attempts are made to penetrate the film. The lines may be formed, for instance, by printing carbon-loaded Polymer Thick Film (PTF) ink onto the film and selectively connecting the lines on each side, by conductive vias, near the edges of the film. Connections between the lines and an enclosure monitor of the communications card may be provided via, for instance, one or more ribbon cables. The ribbon cable itself may be formed of lines of conductive ink printed onto an extension of the film, if desired. Connections between the matrix and the ribbon cable may be made via connectors formed on one edge of the film. As noted, the laminate may be wrapped around the electronic assembly enclosure to define the tamper-respondent sensor 120 surrounding enclosure 110.

In one or more implementations, the various elements of the laminate may be adhered together and wrapped around enclosure 110, in a similar manner to gift-wrapping a parcel, to define the tamper-respondent sensor shape 120. The assembly may be placed in a mold which is then filled with, for instance, cold-pour polyurethane, and the polyurethane may be cured and hardened to form an encapsulant 130. The encapsulant may, in one or more embodiments, completely surround the tamper-respondent sensor 120 and enclosure 110, and thus form a complete environmental seal, protecting the interior of the enclosure. The hardened polyurethane is resilient and increases robustness of the electronic package in normal use. Outer, thermally conductive enclosure 140 may optionally be provided over encapsulant 130 to, for instance, provide further structural rigidity to the electronic package.

Note that, as an enhancement, within a sealed electronic package, such as the tamper-proof electronic package depicted in FIG. 1 and described above, structures and methods for facilitating heat transfer from one or more electronic components disposed therein outwards through the enclosure and any other layers of the electronic package may be provided.

FIG. 2 depicts in detail one embodiment of a typical tamper-proof electronic package 200. Electronic package 200 is defined by, for instance, a base metal shell 202 and a top metal shell 204. Outer surfaces of base metal shell 202 and top metal shell 204 may be provided with standoffs 206, with an electronic assembly 208 resting on standoffs 206 defined in base metal shell 202. Electronic assembly 208 may include, for instance, a printed circuit board 210 with electronic components 212 that are electrically connected via conductors (not shown) defined within or on printed circuit board 210.

Hollow spacers 213 may be placed below dimples 206 in top metal shell 204, and rivets 214 provided, extending through openings in dimples 206, through hollow spacers 213 and through openings in printed circuit board 210 to base metal shell 202 in order to fixedly secure electronic assembly 208 within the enclosure formed by base and top metal shells 202, 204. A security mesh or tamper-respondent sensor 216 is wrapped around the top, base, and four sides of the enclosure formed by base and top metal shells 202, 204. As illustrated, in one or more embodiments, top metal shell 204 may have an opening through which a bus 220 extends. One end of bus 220 may be connected to conductors (not shown) on printed circuit board 210, and the other end may be connected to conductors (not shown) on a printed circuit board 222. As bus 220 passes through the opening, the bus extends between an inner edge region 223 of the security mesh 216 and an overlapping, outer edge region 224 of the security mesh 216. A group of wires 226 connect, in one embodiment, security mesh 216 to conductors on printed circuit board 210. Circuitry on printed circuit board 210 is responsive to a break or discontinuity in security sensor array 216, in which case, an alarm signal may be emitted on bus 220, and also encryption/decryption keys stored within electronic assembly 208 may be erased.

In one or more implementations, liquid polyurethane resin may be applied to security mesh 216 and cured. An outer, thermally conductive enclosure 228, such as a copper enclosure, may be filled with liquid polyurethane resin with the electronic assembly and inner enclosure and security mesh suspended within it. Upon curing the resin, the electronic assembly and inner enclosure and security mesh become embedded in a polyurethane block or encapsulant 230, as shown. The enclosure 228 is mounted on the printed circuit board 222, which can be accomplished using, for instance, legs 240 which extend through slots in printed circuit board 222 and terminate in flanges 242, which are then bent out of alignment with the slots. Bus 220 may be connected, by way of printed circuit board 222 to connectors 244 located along, for instance, one edge of printed circuit board 222.

When considering tamper-proof packaging, the electronic package needs to maintain defined tamper-proof requirements, such as those set forth in the National Institutes of Standards and Technology (NIST) Publication FIPS 140-2, which is a U.S. Government Computer Security Standard, used to accredit cryptographic modules. The NIST FIPS 140-2 defines four levels of security, named Level 1 to Level 4, with Security Level 1 providing the lowest level of security, and Security Level 4 providing the highest level of security. At Security Level 4, physical security mechanisms are provided to establish a complete envelope of protection around the cryptographic module, with the intent of detecting and responding to any unauthorized attempt at physical access. Penetration of the cryptographic module enclosure from any direction has a very high probability of being detected, resulting in the immediate zeroization of all plain text critical security parameters (CSPs). Security Level 4 cryptographic modules are useful for operation in physically unprotected environments. Security Level 4 also protects a cryptographic module against a security compromise due to environmental conditions or fluctuations outside of the module's normal operating ranges for voltages and temperature. Intentional excursions beyond the normal operating ranges may be used by an attacker to thwart the cryptographic module's defenses. The cryptographic module is required to either include specialized environmental protection features designed to detect fluctuations and zeroize critical security parameters, or to undergo rigorous environmental failure testing to provide reasonable assurance that the module will not be affected by fluctuations outside of the normal operating range in a manner that can compromise the security of the module.

To address the demands of ever-improving anti-intrusion technology, and the higher-performance encryption/decryption functions being provided, enhancements to the tamper-proof, tamper-evident packaging for the electronic assembly at issue are desired. Numerous enhancements are described hereinbelow to, for instance, tamper-respondent assemblies and tamper-respondent sensors. Note that the numerous inventive aspects described herein may be used singly, or in any desired combination. Additionally, in one or more implementations, the enhancements to tamper-proof electronic packaging described herein may be provided to work within defined space limitations for existing packages. For instance, one or more of the concepts described may be configured to work with peripheral component interconnect express (PCIe) size limits, and the limitations resulting from being capsulated in, for instance, an insulating encapsulant.

Thus, disclosed hereinbelow with reference to FIGS. 3A-22C are various approaches and/or enhancements to creating a secure volume for accommodating one or more electronic components, such as one or more encryption and/or decryption modules and associated components of a communications card or other electronic assembly.

FIG. 3A depicts a portion of one embodiment of a tamper-respondent layer 305 (or laser and pierce-respondent layer) of a tamper-respondent sensor 300 or security sensor, such as discussed herein. In FIG. 3A, the tamper-respondent layer 305 includes circuit lines or traces 301 provided on one or both opposite sides of a flexible layer 302, which in one or more embodiments, may be a flexible insulating layer or film. FIG. 3A illustrates circuit lines 301 on, for instance, one side of flexible layer 302, with the traces on the opposite side of the film being, for instance, the same pattern, but (in one or more embodiments) offset to lie directly below spaces 303, between circuit lines 301. As described below, the circuit lines on one side of the flexible layer may be of a line width W₁ and have a pitch or line-to-line spacing W_(s) such that piercing of the layer 305 at any point results in damage to at least one of the circuit lines traces 301. In one or more implementations, the circuit lines may be electrically connected in-series or parallel to define one or more conductors which may be electrically connected in a network to an enclosure monitor, which monitors the resistance of the lines, as described herein. Detection of an increase, or other change, in resistance, caused by cutting or damaging one of the traces, will cause information within the encryption and/or decryption module to be erased. Providing conductive lines 301 in a pattern, such as a sinusoidal pattern, may advantageously make it more difficult to breach tamper-respondent layer 305 without detection. Note, in this regard, that conductive lines 301 could be provided in any desired pattern. For instance, in an alternate implementation, conductive lines 301 could be provided as parallel, straight conductive lines, if desired, and the pattern or orientation of the pattern may vary between sides of a layer, and/or between layers.

As noted, as intrusion technology continues to evolve, anti-intrusion technology needs to continue to improve to stay ahead. In one or more implementations, the above-summarized tamper-respondent sensor 300 of FIG. 3A may be disposed over an outer surface of an electronic enclosure, such as an electronic enclosure described above in connection with FIGS. 1 & 2. Alternatively, as described further herein, the tamper-respondent sensor may cover or line an inner surface of an electronic enclosure to provide a secure volume about at least one electronic component to be protected. Numerous enhancements to the tamper-respondent sensor itself are described below.

In one or more aspects, disclosed herein is a tamper-respondent sensor 300 with circuit lines 301 having reduced line widths W₁ of, for instance, 200 μm, or less, such as less than or equal to 100 μm, or even more particularly, in the range of 30-70 μm. This is contrasted with conventional trace widths, which are typically on the order of 350 μm or larger. Commensurate with reducing the circuit line width W₁, line-to-line spacing width W_(s) 303 is also reduced to less than or equal to 200 μm, such as less than or equal to 100 μm, or for instance, in a range of 30-70 μm. Advantageously, by reducing the line width W₁ and line-to-line spacing W_(s) of circuit lines 301 within tamper-respondent sensor 300, the circuit line width and pitch is on the same order of magnitude as the smallest intrusion instruments currently available, and therefore, any intrusion attempt will necessarily remove a sufficient amount of a circuit line(s) to cause resistance to change, and thereby the tamper intrusion to be detected. Note that, by making the circuit line width of the smaller dimensions disclosed herein, any cutting or damage to the smaller-dimensioned circuit line will also be more likely to be detected, that is, due to a greater change in resistance. For instance, if an intrusion attempt cuts a 100 μm width line, it is more likely to reduce the line width sufficiently to detect the intrusion by a change in resistance. A change in a narrower line width is more likely to result in a detectable change in resistance, compared with, for instance, a 50% reduction in a more conventional line width of 350 μm to, for instance, 175 μm. The smaller the conductive circuit line width becomes, the more likely that a tampering of that line will be detected.

Note also that a variety of materials may advantageously be employed to form the circuit lines. For instance, the circuit lines may be formed of a conductive ink (such as a carbon-loaded conductive ink) printed onto one or both opposite sides of one or more of the flexible layers 302 in a stack of such layers. Alternatively, a metal or metal alloy could be used to form the circuit lines, such as copper, silver, intrinsically conductive polymers, carbon ink, or nickel-phosphorus (NiP), or Omega-Ply®, offered by Omega Technologies, Inc. of Culver City, Calif. (USA), or Ticer™ offered by Ticer Technologies, Chandler, Ariz. (USA). Note that the process employed to form the fine circuit lines or traces on the order described herein is dependent, in part, on the choice of material used for the circuit lines. For instance, if copper circuit lines are being fabricated, then additive processing, such as plating up copper traces, or subtractive processing, such as etching away unwanted copper between trace lines, may be employed. By way of further example, if conductive ink is employed as the circuit line material, fine circuit lines on the order disclosed herein can be achieved by focusing on the rheological properties of the conductive ink formulation. Further, rather than simple pneumatics of pushing conductive ink through an aperture in a stencil with a squeegee, the screen emulsion may be characterized as very thin (for instance, 150 to 200 μm), and a squeegee angle may be used such that the ink is sheared to achieve conductive ink breakaway rather than pumping the conductive ink through the screen apertures. Note that the screen for fine line width printing such as described herein may have the following characteristics in one specific embodiment: a fine polyester thread for both warp and weave on the order of 75 micrometers; a thread count between 250-320 threads per inch; a mesh thickness of, for instance, 150 micrometers; an open area between threads that is at least 1.5× to 2.0× the conductive ink particle size; and to maintain dimensional stability of the print, the screen snap-off is kept to a minimum due the screen strain during squeegee passage.

In one or more implementations, circuit lines 301 of tamper-respondent sensor 300 are electrically connected to define one or more resistive networks. Further, the circuit lines may include one or more resistive circuit lines by selecting the line material, line width W₁ and line length L₁, to provide a desired resistance per line. As one example, a “resistive circuit line” as used herein may comprise a line with 1000 ohms resistance or greater, end-to-end. In one specific example, a circuit line width of 50 μm, with a circuit line thickness of 10 μm may be used, with the line length L₁ and material selected to achieve the desired resistance. At the dimensions described, good electrical conductors such as copper or silver may also be employed and still form a resistive network due to the fine dimensions noted. Alternatively, materials such as conductive ink or the above-noted Omega-Ply® or Ticer™ may be used to define resistive circuit lines.

In a further aspect, the flexible layer 302 itself may be further reduced in thickness from a typical polyester layer by selecting a crystalline polymer to form the flexible layer or substrate. By way of example, the crystalline polymer could comprise polyvinylidene difluoride (PVDF), or Kapton, or other crystalline polymer material. Advantageously, use of a crystalline polymer as the substrate film may reduce thickness of the flexible layer 302 to, for instance, 2 mils thick from a more conventional amorphous polyester layer of, for instance, 5-6 mils. A crystalline polymer can be made much thinner, while still maintaining structural integrity of the flexible substrate, which advantageously allows for far more folding, and greater reliability of the sensor after folding. Note that the radius of any fold or curvature of the sensor is necessarily constrained by the thickness of the layers comprising the sensor. Thus, by reducing the flexible layer thickness to, for instance, 2 mils, then in a four tamper-respondent layer stack, the stack thickness can be reduced from, for instance, 20 mils in the case of a typical polyester film, to 10 mils or less with the use of crystalline polymer films.

As noted, the circuit lines 301 forming the at least one resistive network may be disposed on either the first side or the second side of the opposite sides of the flexible layer(s) 302 within the tamper-respondent sensor 300, or on both the first and second sides. One embodiment of this depicted in FIG. 3B, wherein circuit lines 301 are illustrated on both opposite sides of flexible layer 302. In this example, circuit lines 301 on the opposite sides of the tamper-respondent sensor 302 may each have line widths W₁ less than or equal to 200 μm, and those lines widths may be the same or different. Further, the line-to-line spacing width W_(s) between adjacent lines of the circuit lines 301 may also be less than or equal to 200 μm, and may also be the same or different. In particular, the circuit lines may be different line widths on the two different sides of the tamper-respondent layer, and the line-to-line spacing widths may also be different. For instance, a first side of the tamper-respondent layer may have circuit line widths and line-to-line spacings of approximately 50 while the second side of the tamper-respondent layer may have circuit lines and line-to-line spacing of 70 μm. Intrusion through the sensor is potentially made more difficult by providing such different widths. Circuit lines 301 on the opposite sides of the flexible layer 302 may also be in the same or different patterns, and in the same or different orientations. If in the same pattern, the circuit lines may be offset, as noted above, such that the circuit lines of one side align to spaces between circuit lines on the other side.

As illustrated in FIG. 3C, the tamper-respondent sensor 300 may comprise a stack of tamper-respondent layers 305 secured together via an adhesive 311, such as a double-sided adhesive film. The process may be repeated to achieve any desired number of tamper-respondent layers, or more particularly, any desired number of layers of circuit lines 301 within the tamper-respondent sensor to achieve a desired anti-intrusion sensor.

An alternate tamper-respondent sensor 300′ is depicted in FIG. 3D, where multiple flexible layers 302 with circuit lines are secured together via an adhesive 311, and by way of example, circuit lines are provided on one or both sides of each flexible layer. In this example, a first flexible layer 302 has first circuit lines 301 and a second flexible layer 302 has second circuit lines 301′. In one or more implementations the first circuit lines may have a first line width W₁ and the second circuit lines may have a second line width W₁, where the first line width of the first circuit lines 301 is different from the second line with the second circuit lines 301′. For instance, the first circuit line width may be 50 μm, and the second circuit line width may be 45 μm. Note that any desired combination of circuit line widths may be employed in this example, which assumes that the circuit line widths may be different between at least two of the layers. Additionally, the first circuit lines 301 of the first flexible layer may have first line-to-line spacing width W_(s) and the second circuit lines 301′ of second flexible layer may have a second line-to-line spacing width W_(s), where the first line-to-line spacing width of the first circuit lines may be different from the second line-to-line spacing width of the second circuit lines. Note that this concept applies as well to circuit lines on only one side of flexible layer 302, where two or more of the flexible layers in the stack defining the tamper-respondent sensor may have different circuit line widths and/or different line-to-line spacing widths. This concept may be extended to any number of tamper-respondent layers within the tamper-respondent sensor to provide a desired degree of tamper protection.

In addition, or alternatively, the first circuit lines 301 of the first flexible layer may be formed of a first material, and the second circuit lines 301′ of the second flexible layer may be formed of a second material, where the first material of the first circuit lines 301 may be different from the second material of the second circuit lines 301′. For instance, first circuit lines 301 may be formed of conductive ink, and second circuit lines 301′ may be formed of a metal, such as copper. By providing tamper-respondent sensor 300′ with at least some of the circuit lines formed of a metal material, such as copper, enhanced tamper-detection may be obtained. For instance, an intrusion tool passing through one or more layers of circuit lines 301′ formed of a metal could generate debris which may be distributed during the intrusion attempt and result in shorting or otherwise damaging one or more other tamper-respondent layers within the tamper-respondent sensor 300′. If desired, more than two materials may be employed in more than one layers of circuit lines within the tamper-respondent sensor.

FIG. 3E depicts another embodiment of a tamper-respondent assembly 300″, in accordance with one or more aspects of the present invention. In this implementation, multiple tamper-respondent layers 305 are secured with another flexible layer 320 in a stack using, for instance, one or more layers of an adhesive film 311. In one or more implementations, the another flexible layer 320 could comprise a malleable metal film. In the example shown, the malleable metal film is disposed between two tamper-respondent layers 305, and thus, is disposed between two layers of circuit lines 301 on the different tamper-respondent layers 305. By way of example, malleable metal film 320 could comprise a sheet of copper or a copper alloy. By providing a thin malleable metal film 320 on the order of, for instance, 0.001″ thickness, an attempt to penetrate through tamper-respondent sensor 300″ would necessarily pass through malleable metal film 320, and in so doing generate debris which would be carried along by the intrusion tool or drill. This metal debris would facilitate detection of the intrusion attempt by potentially shorting or otherwise damaging one or more of the tamper-respondent layers 305 within tamper-respondent sensor 300″. As a variation, the malleable metal film 320 could be applied directly to one side of a flexible layer 302 with the opposite side having circuit lines forming the at least one resistive network. Note that a similar concept applies where one or more of the layers of circuit lines 301 are formed of metal circuit lines, such as copper or silver, and other layers of circuit lines 301 are formed of, for instance, conductive ink. In such embodiments, clipping of one or more metal lines would generate metal debris that could carried along by the intrusion tool and ultimately interact with one or more other circuit lines of the tamper-respondent electronic circuit structure to enhance the likelihood of damage and thus detection of the intrusion attempt.

Based on the description provided herein, those skilled in the art will understand that the tamper-respondent sensors described above in connection with FIGS. 3A-3E may be employed with any of a variety of different tamper-respondent assemblies, and if desired, may be pre-formed in any of the various configurations described herein below. For instance, one or more of the tamper-respondent sensors of FIGS. 3A-3E could be used in conjunction with an electronic enclosure to enclose, at least in part, one or more electronic components to be protected, with the tamper-respondent sensor overlying or being adhered to an outer surface of the electronic enclosure. Alternatively, in one or more implementations, the tamper-respondent sensor could be provided to cover or line an inner surface of the electronic enclosure, such as in one or more of the tamper-respondent assembles described below.

In contrast to a prior tamper-respondent sensor which may utilize a single substrate of flexible dielectric with circuit lines, either on the upper or lower surface, or both surfaces, provided herein are tamper-respondent sensors which comprise, in one or more embodiments, multiple layers of materials and circuits to provide an enhanced tamper-proof, tamper-evident packaging, to meet the demands of ever-improving anti-intrusion technology requirements to protect encryption/decryption functions. By way of example, FIGS. 4A & 4B depict tamper-respondent sensors comprising stacks of layers, each of which include at least one formed flexible layer, which may be configured, by way of example, as a corrugated layer of flexible dielectric with circuit lines on one or both sides. Note that as used herein, a “formed layer” refers to a specially-shaped layer manufactured with, for instance, curvatures extending, at least in part, out-of-plane. For example, in the case of a corrugated layer as shown, the curvatures have a vertical component that results in an undulation of the formed layer.

As illustrated in FIG. 4A, a tamper-respondent sensor 400 may include, by way of example, a first sensor layer 410, a second sensor layer 420, and a third sensor layer 430, with the second sensor layer 420 being sandwiched between the first and third sensor layers 410, 430. In this configuration, second sensor layer 420 comprises a formed flexible layer 401 having opposite first and second sides with circuit lines 402 comprising, for instance, conductive lines, such as metal lines (e.g., Cu or Au lines), wires, printed conductive ink (e.g., carbon ink), resistive materials, etc., which form at least one resistive network on at least one of the first side or the second side of the formed flexible layer. In one or more embodiments, the circuit lines may comprise fine-pitched line circuitry, for instance, circuit lines in the 20-50 μm width range, and 20-50 μm spaces between the circuit lines. In one or more implementations, the formed flexible layer comprises, at least in part, a dielectric material (such as polyimide, Mylar™, Teflon™, etc.), with the layer in such an example being referred to as a corrugated layer of flexible dielectric that has the circuit lines overlying, at least in part, the curvatures of the corrugated layer of flexible dielectric, as illustrated. Note in the example of FIG. 4A, a cross-section through the tamper-respondent sensor 400 intersects multiple layers of circuit lines on the different sensor layers. The wiring patterns of the circuit lines may be in any desired configuration. For instance, circuit lines may be orthogonal or angled, or randomly arranged, with respect to adjacent or underlying or overlying circuit lines of the tamper-respondent sensor. This option applies to any of the tamper-respondent sensors disclosed herein, where circuit lines are provided on multiple different surfaces of a tamper-respondent sensor. As a further variation, each tamper-respondent electronic circuit structure may have a unique circuit line configuration or set of circuit line configurations associated with, for instance, a serial number of the tamper-respondent electronic circuit structure being provided. Also, any desired number of sensor layers may be associated with the at least one formed flexible layer of the tamper-respondent sensor.

Therefore, in one or more embodiments, first sensor layer 410 and third sensor layer 430 may also each comprise a flexible layer of material having circuit lines forming one or more resistive networks disposed on the first and/or second sides thereof. For instance, conductive circuit lines may be provided on both the first and second sides of the flexible layers of the first sensor layer 410, the second sensor layer 420, and the third sensor layer 430, such that a vertical cross-section through the stack of layers intersects multiple layers of circuit lines. In this configuration, forming the second sensor layer 420 with curvatures, for instance, forming the second layer to be corrugated, advantageously enhances protection against physical intrusion, such as by a drill, without detection by the resistive networks by making the location of the circuit lines defining the resistive network(s) harder to identify.

By way of example, the second sensor layer 420 may initially comprise a thin, flexible layer of material, such as a thin, flexible layer with a thickness comparable to the desired minimum radius of the bending curvature for the desired corrugation of the second sensor layer. In one or more implementations, the second sensor layer may be corrugated by obtaining a flat, flexible sensor which is then fed through a set of heated top and bottom rollers, each with mating gear teeth to create the desired sinusoidal pattern in the sensor layer. One or more outer circuit layers or films comprising the circuit lines forming the one or more resistive networks may then be laminated, as desired, to one or both of the first and second sides of the formed layer to define the formed, flexible layer. In one or more implementations, an adhesive may be employed to affix the circuit layers or films comprising the one or more resistive networks to the formed layer. By way of example, the adhesive could include a PSA, epoxy, acrylic, thermoset, thermoplastic, electrically conductive epoxy, thermally conductive epoxy, etc., one or more of which could also be employed to affix the multiple sensor layers 410, 420, 430 together within the stack of layers.

As illustrated in FIG. 4B, multiple second, corrugated layers 420 of flexible dielectric with circuit lines may be provided in the stack of layers of the tamper-respondent sensor 400 with, for instance, adjacent corrugated layers of flexible dielectric being separated by a substantially flat flexible layer, with or without additional circuit lines defining one or more additional resistive networks. In the embodiment depicted, adjacent corrugated layers of flexible dielectric with circuit lines are separated by a sensor layer 425, which again may include circuit lines on one or both sides thereof.

Connections of the tamper-respondent sensors, and sensor layers, described herein to, for instance, monitor circuitry disposed within the associated secure volume defined by the tamper-respondent electronic circuit structure may comprise input/output contacts or connectors formed on one or more edges of the tamper-respondent sensor (or sensor layer) or, for instance, one or more ribbon cables extending from the tamper-respondent sensor into the secure volume, as will be understood by one skilled in the art.

FIGS. 5A & 5B depict another embodiment of a tamper-respondent sensor 500, in accordance with one or more aspects of the present invention. As illustrated, tamper-respondent sensor 500 includes at least one formed flexible layer 510 having opposite first and second surfaces 511, 512. Circuit lines 501 forming at least one resistive network are provided on at least one of the first or second sides 511, 512 of formed flexible layer 510. As noted, the circuit lines may comprise any desired pattern of conductive circuit lines advantageous for a particular tamper-respondent sensor technology, and may include multiple sets of circuit lines in different regions or zones of the formed flexible layer. By way of example, the circuit lines may comprise conductive lines such as metal lines (e.g., copper lines), wires, printed conductive ink (e.g., carbon ink), etc. provided on one or both of the first and second sides of formed flexible layer 510. As illustrated in FIG. 5A, the formed flexible layer again includes curvatures 513, with the formed flexible layer with curvatures being collapsed as a flattened, folded layer in this embodiment. Note that circuit lines 501 forming the at least one resistive network on the first side 511 or second side 512 of formed flexible layer 510 overlie, at least in part, at least some of curvatures 513, such that the circuit lines wrap over or within the curvatures 513 and in transverse cross-section view, provide multiple layers of circuit lines formed on the same curving surface of the formed flexible layer. In one or more embodiments, formed flexible layer 510 may be a corrugated layer that has been flattened by applying a z-direction force with a metered x-y shear force, creating a controlled, flattening collapse of the multi-dimensional, formed flexible layer 510.

FIGS. 5C-5H depict various examples of a tamper-respondent sensor comprising a stack of layers, with one or more of the layers comprising a formed flexible layer 510, such as described above in connection with FIGS. 5A & 5B. By way of example, FIG. 5C depicts a stack of layers comprising formed flexible layer 510 with at least one other layer 520 overlying one or both of first side 511 and second side 512 of formed flexible layer 510. In one or more embodiments, the at least one other layer 502 overlying the formed flexible layer 510 may be, or include, an opaque layer of material to mask location of the circuit lines, or a frangible layer of material that will break apart with tampering and facilitate damaging the circuit lines forming the at least one resistive network to assist with detection of the attack on the tamper-respondent sensor. In one or more implementations, the opaque layer of material may be dark, non-transparent material obscuring what lies beneath, or, in one or more embodiments, the opaque material could be the same color material as the resistive circuit lines of the underlying layer, both obscuring and camouflaging the covered circuit lines.

In FIG. 5D, multiple other layers 521, 522 overlie one or both sides 511, 512 of formed flexible layer 510. In one example, the multiple other layers may include both a breakable layer 521 and an opaque layer 522 disposed on one side of formed flexible layer 510, or both sides of formed flexible layer 510.

In further embodiments, one or more of the other layers may themselves comprise a flexible dielectric material with circuit lines forming at least one other resistive network on one of the first side or second side thereof. FIG. 5E depicts one other layer 520 overlying second side 512 of formed flexible layer 510, and FIG. 5F depicts one other layer 520 overlying first side 511, and one other layer 520 overlying second side 512 of formed flexible layer 510.

FIGS. 5G & 5H depict additional embodiments of a tamper-respondent sensor 500 comprising a stack of layers. In these embodiments, multiple formed flexible layers 510 are provided along with one or more other layers overlying one or more sides 511, 512 of the formed flexible layers 510. As noted, the one or more other layers may comprise a variety of layers, such as an opaque flexible layer, a frangible layer, or additional flexible layers with circuit lines forming additional resistive networks of the tamper-respondent sensor, as desired to provide enhanced tamper-proof, tamper evident packaging for a particular application.

FIGS. 6A-6G depict various embodiments of a tamper-respondent assembly, generally denoted 600, within which a secure volume is defined for protecting one or more electronic components or an electronic assembly, such as discussed herein. Referring to FIG. 6A, tamper-respondent assembly 600 may include an electronic enclosure 601, such as a rigid, conductive enclosure, and a tamper-respondent electronic circuit structure 602 associated with the electronic enclosure 601. As shown, tamper-respondent electronic circuit structure 602 comprises a tamper-respondent sensor 605. In one or more implementations, tamper-respondent sensor 605 includes at least one formed flexible layer having opposite first and second sides, circuit lines forming at least one resistive network disposed on at least one of first or second sides, and formed curvatures provided within the formed flexible layer, with the circuit lines overlying, at least in part, the curvatures of the formed flexible layer, such as described above in connection with the exemplary embodiments of FIGS. 4A-5H.

In the implementation of FIG. 6A, a single, continuous tamper-respondent sensor 605 is provided, which is wrapped around to encircle electronic enclosure 601, and which includes overlaps 606 where the ends join along the electronic enclosure 601. For instance, the single, continuous tamper-respondent sensor 605 could be folded around electronic enclosure 601 in any manner analogous to wrapping a present. By way of example only, electronic enclosure 601 may be a 6-sided metal container, sized to accommodate the electronics to be protected. Further, in this configuration, tamper-respondent sensor 605, configured as described herein, may be employed in an electronic assembly package such as described initially in connection with FIGS. 1 & 2.

FIGS. 6B-6G depict further embodiments of tamper-respondent assembly 600. In one or more of these embodiments, multiple discrete tamper-respondent sensors 610, 611, 612, are illustrated. By way of example, each tamper-respondent sensor may include one or more formed flexible layers with circuit lines extending, at least in part, over the curvatures of the formed flexible layers, such as described herein.

In the example of FIG. 6B an upper tamper-respondent sensor 610 and a lower tamper-respondent sensor 611 are provided overlying the upper and lower main surfaces, respectively, of electronic enclosure 601. Additionally, a sidewall tamper-respondent sensor 612 wraps around the edge of electronic enclosure 601, and in this example, is of sufficient width to fold over and thus overlap 606 upper tamper-respondent 610 and lower tamper-respondent 611, as illustrated. The extent of overlap 606 may be customized as desired to inhibit a line of attack through the tamper-respondent electronic circuit structure at the seams where different tamper-respondent sensors 610, 611, 612 meet.

FIG. 6C is an upper plan view of one embodiment of the assembly of FIG. 6B, with tamper-respondent sensor 612 shown wrapping over upper tamper-respondent sensor 610 provided over the upper main surface of electronic enclosure 601. An analogous wrapping of tamper-respondent sensor 612 over the lower tamper-respondent sensor may also be employed. Note in this configuration the provision of diagonal folds 615 at the corners, where tamper-respondent sensor 612 overlaps upper tamper-respondent sensor 610. This overlap and fold example of FIG. 6C is provided by way of example only, and other overlap and fold configurations may be employed, without departing from the scope of the claims presented herewith. In this six-sided enclosure example, sidewall tamper-respondent sensor 612 is a separate sensor that wraps around the perimeter of electronic assembly enclosure 601, and overlaps the upper and lower tamper-respondent sensors 610, 611, respectively.

FIG. 6D depicts a variation on the tamper-respondent assembly 600 of FIG. 6B, wherein upper tamper-respondent sensor 610 and lower tamper-respondent sensor 611 are extended past the upper and lower surfaces, respectively, of electronic enclosure 601 and are folded to overlap sidewall tamper-respondent sensor 612 provided along the edge or perimeter of electronic enclosure 601.

FIGS. 6E & 6F depict alternate embodiments of upper tamper-respondent sensor 610, for use in various embodiments of a tamper-respondent assembly, including, for instance, an assembly such as depicted in FIG. 6D, where upper tamper-respondent sensor 610 wraps over an edge of the enclosure and sidewall tamper-respondent sensor 612 is sized to the width of the edge or sidewall of electronic enclosure 601. In the upper tamper-respondent sensor 610 embodiment of FIG. 6E, corner cutouts or indents 607 are established to facilitate folding of the illustrated edge flaps over the sidewall tamper-respondent sensor 612 as illustrated, for instance, in FIG. 6D. If desired, where the edge flaps meet at the corners of the assembly package, additional corner tamper-respondent sensors (not shown) may be used as patches over the corners to provide still further tamper-proof, tamper-evident packaging along the respective seams of the edge flaps. Note that, in this configuration, the sidewall tamper-respondent sensor 612 (FIG. 6D) wraps fully around the electronic enclosure 601, and thus, necessarily provides coverage at the seams where the edge flaps meet.

As a variation, FIG. 6F depicts upper tamper-respondent sensor 610 with corner cutouts 608 reduced to slots or channels to define tabs from the edge flaps at the corners of the edge flaps, so as to allow for a further folding along the edge or sidewall of the electronic enclosure 601. That is, the further tabs may be transversely folded over the seam between adjoining edge flaps at the corners when the upper tamper-respondent sensor 610 is folded over sidewall tamper-respondent sensor 612, such as illustrated in FIG. 6D.

Note that in the embodiments of FIGS. 6A-6D, the tamper-respondent sensors may have respective input/output (I/O) cabling extending off one or more ends thereof in a region under an overlap area of two of the tamper-respondent sensors, with the I/O cabling extending into the secure volume of the package to make electrical connection with the tamper-detect circuitry. For instance, the resistive networks within the tamper-respondent sensors may be electrically coupled to circuitry within the secure volume for monitoring the networks. The monitor circuitry may include various bridge and/or compare circuits, and utilize conventional electrical interconnect inside the secure volume of electronic enclosure 601. Any of a number of interconnect configurations may be employed dependent, for instance, on the number and characteristics of the resistive networks provided within the tamper-respondent sensors.

In the embodiment of FIG. 6G, tamper-respondent sensor 612 (FIG. 6D) is removed, and size of the upper and lower tamper-respondent sensors 610, 611 is extended to allow the upper and lower tamper-respondent sensors 610, 611 to overlap along the edge or sidewall of electronic enclosure 601 where folded, as shown.

Note that although depicted in FIGS. 6A-6G as flattened, folded layers, one or more of the respective tamper-respondent sensors illustrated could be otherwise implemented. For instance, one or more of the upper, lower, or sidewall tamper-respondent sensors in the depicted examples could comprise other formed, flexible layers, such as depicted in FIGS. 4A-5H, or other non-formed, flexible layers, with circuit lines forming resistive networks on one or both opposing sides of the flexible layer(s). Further examples of tamper-respondent sensors are described below in connection with FIGS. 7A-7C.

FIGS. 7A-7C depict a further embodiment of a tamper-respondent circuit structure comprising one or more multi-sensor interweaved layers. In particular, a first tamper-respondent sensor 700 is depicted in FIG. 7A as comprising at least one first layer 701, such as a flexible dielectric layer having opposite first and second sides. First circuit lines 702 are provided on at least one of the first side or the second side of the at least one first layer 701 to form at least one first resistive network. Multiple slits 703 are provided within the at least one first layer 701, with the first circuit lines being located back from the multiple slits 703 a specified minimum distance, such as 2-10 mils.

As illustrated in FIG. 7B, the tamper-respondent electronic circuit structure may comprise a multi-sensor interweaved layer 720 defined by interweaving first tamper-respondent sensor 700 with a second tamper-respondent sensor 710 constructed, in one or more embodiments, similarly to first tamper-respondent sensor 700. In particular, second tamper-respondent sensor 710 may include at least one layer, such as at least one flexible layer having opposite first and second sides, and second circuit lines disposed on at least one of the first or second sides of the at least one second layer, which define at least one second resistive network. Note that the at least one first resistive network and at least one second resistive network may be the same or differently patterned resistive networks. For instance, in one or more implementations, the width of the circuit lines or traces in the different resistive networks, as well as the pitch between lines, may be varied. By providing slits within first tamper-respondent sensor 700 and second tamper-respondent sensor 710, the resultant fingers of the first and second tamper-respondent sensors may be interweaved to define multi-sensor interweaved layer 720 to comprise a checkerboard pattern, as illustrated by way of example in FIG. 7B.

As depicted in FIG. 7C, an enhanced tamper-respondent electronic circuit structure may be obtained by stacking two multi-sensor interweaved layers 720, with the slit lines, and in particular, the intersections of the slit lines, offset to provide a more tamper-proof, tamper-evident electronic structure. For instance, the multi-sensor interweaved layer 720 of FIG. 7B may be a first multi-sensor interweaved layer, and the circuit structure may include a second multi-sensor interweaved layer overlying the first sensor interweaved layer, with the second multi-sensor interweaved layer being formed from additional discrete tamper-respondent sensors, in a manner such as described above in connection with FIGS. 7A & 7B. In this configuration, the second multi-sensor interweaved layer 720′ may be constructed such that the slit intersections between the discrete tamper-respondent sensors interweaved into that layer do not align with those of the first multi-sensor interweaved layer 720 when stacked. For instance, the slits in the second multi-sensor interweaved layer 720′ could be differently spaced apart from those in the first multi-sensor interweaved layer 720 such that the intersections of the slits in the second multi-sensor interweaved layer are offset from those in the first multi-sensor interweaved layer, or second multi-sensor interweaved layer 720′ could be identically constructed as first multi-sensor interweaved layer 702, but offset slightly from the first multi-sensor interweaved layer when stacked. Advantageously, in one or more implementations, one or more multi-sensor interweaved layers 720, 720′ may be employed as one of the upper, lower, or sidewall tamper-respondent sensors described above in connection with FIGS. 6A-6G, if desired.

By way of further example, FIGS. 8A & 8B depict one embodiment of another tamper-respondent assembly, or tamper-proof electronic package 800, which comprises an electronic circuit 815, in accordance with one or more further aspects of the present invention.

Referring collectively to FIGS. 8A & 8B, electronic circuit 815 includes a multilayer circuit board 810 which has an embedded tamper-respondent sensor 811 therein that facilitates defining, in part, a secure volume 801 associated with multilayer circuit board 810 that extends into multilayer circuit board 810. In particular, in the embodiment of FIGS. 8A & 8B, secure volume 801 exists partially within multilayer circuit board 810, and partially above multilayer circuit board 810. One or more electronic components 802 are mounted to multilayer circuit board 810 within secure volume 801 and may comprise, for instance, one or more encryption modules and/or decryption modules, and associated components, with the tamper-proof electronic package comprising, in one or more embodiments, a communications card of a computer system.

Tamper-proof electronic package 800 further includes an enclosure 820, such as a pedestal-type enclosure, mounted to multilayer circuit board 810 within, for instance, a continuous groove (or trench) 812 formed within an upper surface of multilayer circuit board 810. In one or more embodiments, enclosure 820 may comprise a thermally conductive material and operate as a heatsink for facilitating cooling of the one or more electronic components 802 within the secure volume. A security mesh or tamper-respondent sensor 821, such as the above-described tamper-respondent sensors of FIGS. 4A-7C, may be associated with enclosure 820, for example, wrapping around the inner surface of enclosure 820 to facilitate defining, in combination with tamper-respondent sensor 811 embedded within multilayer circuit board 810, secure volume 801. In one or more implementations, tamper-respondent sensor 821 extends down into continuous groove 812 in multilayer circuit board 810 and may, for instance, even wrap partially or fully around the lower edge of enclosure 820 within continuous groove 812 to provide enhanced tamper-detection where enclosure 820 couples to multilayer circuit board 810. In one or more implementations, enclosure 820 may be securely affixed to multilayer circuit board 810 using, for instance, a bonding material such as an epoxy or other adhesive.

As depicted in FIG. 8B, one or more external circuit connection vias 813 may be provided within multilayer circuit board 810 for electrically connecting to the one or more electronic components 802 (FIG. 8A) within secure volume 801. These one or more external circuit connection vias 813 may electrically connect to one or more external signal lines or planes (not shown) embedded within multilayer circuit board 810 and extending, for instance, into a secure base region of (or below) secure volume 801, as explained further below. Electrical connections to and from secure volume 801 may be provided by coupling to such external signal lines or planes within the multilayer circuit board 810.

As noted with reference to FIGS. 8A & 8B, secure volume 801 defined in association with multilayer circuit board 810 may be sized to house electronic components 802 to be protected, and be constructed to extend into multilayer circuit board 810. In one or more implementations, multilayer circuit board 810 includes electrical interconnect within the secure volume 801 defined in the board, for instance, for electrically connecting the multiple tamper-respondent layers of the embedded tamper-respondent sensor 811 to associated monitor circuitry also disposed within secure volume 801, along with, for instance, one or more daughter cards, such as memory DIMMs, PCIe cards, processor cards, etc.

Note that the embodiment depicted in FIGS. 8A & 8B is presented by way of example only. In one or more other implementations, the electronic circuit may comprise multiple multilayer circuit boards, each with a tamper-respondent sensor embedded within the multilayer circuit board with an appropriate connector, located within a secure volume defined between two adjacent multilayer circuit boards, interconnecting selected wiring of the multilayer circuit boards. In such an implementation, the overlying multilayer circuit board could be hollowed out to accommodate, for instance, the connector and/or one or more other electronic components between the multilayer circuit boards. In addition, other configurations of enclosure 820, and/or other approaches to coupling enclosure 820 and multilayer circuit board 810 may be employed.

By way of further example, FIG. 9 depicts a partial cross-sectional elevational view of one embodiment of multilayer circuit board 810 and enclosure 820. In this configuration, the embedded tamper-respondent sensor includes multiple tamper-respondent layers including, by way of example, at least one tamper-respondent mat (or base) layer 900, and at least one tamper-respondent frame 901. In the example depicted, two tamper-respondent mat layers 900 and two tamper-respondent frame 901 are illustrated, by way of example only. The lower-most tamper-respondent mat layer 900 may be a continuous sense or detect layer extending completely below the secure volume being defined within multilayer circuit board 810. One or both tamper-respondent mat layers 900 below secure volume 801 may be partitioned into multiple circuit zones, as discussed further below. Within each tamper-respondent mat layer, or more particularly, within each circuit zone of each tamper-respondent mat layer, multiple circuits or conductive traces are provided in any desired configuration, such as the configuration described above in connection with FIG. 3. Further, the conductive traces within the tamper-respondent layers may be implemented as, for instance, a resistive layer which is difficult to attach shunt circuits to, as explained further below.

As illustrated, one or more external signal lines or planes 905 enter secure volume 801 between, in this embodiment, two tamper-respondent mat layers 900, and then electrically connect upwards into the secure volume 801 through one or more conductive vias, arranged in any desired location and pattern. In the configuration depicted, the one or more tamper-respondent frames 901 are disposed at least inside of the area defined by continuous groove 812 accommodating the base of enclosure 820. Together with security sensor 821 associated with enclosure 820, tamper-respondent frames 901 define secure volume 801 where extending, in part, into multilayer circuit board 810. With secure volume 801 defined, at least in part, within multilayer circuit board 810, the external signal line(s) 905 may be securely electrically connected to, for instance, the one or more electronic components 802 (FIG. 8A) mounted to multilayer circuit board 810 within secure volume 801. In addition, the secure volume 801 may accommodate electrical interconnection of the conductive traces of the multiple tamper-respondent layers, for instance, via appropriate monitor circuitry.

Added security may be provided by extending tamper-respondent mat layers 900 (and if desired, tamper-respondent frames 901) outward past continuous groove 812 accommodating enclosure 820. In this manner, a line of attack may be made more difficult at the interface between enclosure 820 and multilayer circuit board 810 since the attack would need to clear tamper-respondent mat layers 900, the bottom edge of tamper-respondent sensor 821 associated with enclosure 820, as well as the tamper-respondent frames 901 of the embedded tamper-respondent sensor.

Variations on the multilayer circuit board 810 of FIG. 8A are possible. For instance, in this embodiment, the embedded tamper-respondent sensor includes multiple tamper-respondent mat layers 900 and multiple tamper-respondent frames 901, such as described above, and a tri-plate structure comprising one or more external signal lines or layers sandwiched between an upper ground plane and a lower ground plane. In this configuration, high-speed transfer of signals to and from the secure volume, and in particular, to and from the one or more electronic components resident within the secure volume, would be facilitated.

Note also that, once within the secure volume is defined within multilayer circuit board 810, conductive vias within the secure volume between layers of multilayer circuit board 810 may be either aligned, or offset, as desired, dependent upon the implementation. Alignment of conductive vias may facilitate, for instance, providing a shortest connection path, while offsetting conductive vias between layers may further enhance security of the tamper-proof electronic package by making an attack into the secure volume through or around one or more tamper-respondent layers of the multiple tamper-respondent layers more difficult.

The tamper-respondent layers of the embedded tamper-respondent sensor formed within the multilayer circuit board of the electronic circuit or electronic package may include multiple conductive traces or lines formed between, for instance, respective sets of input and output contacts or vias at the trace termination points. Any number of conductive traces or circuits may be employed in defining a tamper-respondent layer or a tamper-respondent circuit zone within a tamper-respondent layer. For instance, 4, 6, 8, etc., conductive traces may be formed in parallel (or otherwise) within a given tamper-respondent layer or circuit zone between the respective sets of input and output contacts to those conductive traces.

In one or more implementations, the multilayer circuit board may be a multilayer wiring board or printed circuit board formed, for instance, by building up the multiple layers of the board. FIG. 10 illustrates one embodiment for forming and patterning a tamper-respondent layer within such a multilayer circuit board.

As illustrated in FIG. 10, in one or more implementations, a tamper-respondent layer, such as a tamper-respondent mat layer or a tamper-respondent frame disclosed herein, may be formed by providing a material stack comprising, at least in part, a structural layer 1001, such as a pre-preg (or pre-impregnated) material layer, a trace material layer 1002 for use in defining the desired trace patterns, and an overlying conductive material layer 1003, to be patterned to define conductive contacts or vias electrically connecting to the pattern of traces being formed within the trace material layer 1002, for instance, at trace terminal points. In one or more implementations, the trace material layer 1002 may comprise nickel phosphorous (NiP), and the overlying conductive layer 1003 may comprise copper. Note that these materials are identified by way of example only, and that other trace and/or conductive materials may be used within the build-up 1000.

A first photoresist 1004 is provided over build-up 1000, and patterned with one or more openings 1005, through which the overlying conductive layer 1003 may be etched. Depending on the materials employed, and the etch processes used, a second etch process may be desired to remove portions of trace material layer 1002 to define the conductive traces of the subject tamper-respondent layer. First photoresist 1004 may then be removed, and a second photoresist 1004′ is provided over the conductive layer 1003 features to remain, such as the input and output contacts. Exposed portions of conductive layer 1003 are then etched, and the second photoresist 1004′ may be removed, with any opening in the layer being filled, for instance, with an adhesive (or pre-preg) and a next build-up layer is provided, as shown. Note that in this implementation, most of overlying conductive layer 1003 is etched away, with only the conductive contacts or vias remaining where desired, for instance, at the terminal points of the traces formed within the layer by the patterning of the trace material layer 1002. Note that any of a variety of materials may be employed to form the conductive lines or traces within a tamper-respondent layer. Nickel-phosphorous (NiP) is particularly advantageous as a material since it is resistant to contact by solder, or use of a conductive adhesive to bond to it, making it harder to bridge from one circuit or trace to the next during an attempt to penetrate into the protected secure volume of the electronic circuit. Other materials which could be employed include OhmegaPly®, offered by Ohmega Technologies, Inc., of Culver City, Calif. (USA), or Ticer™, offered by Ticer Technologies of Chandler, Ariz. (USA).

The trace lines or circuits within all of the tamper-respondent layers, and in particular, the tamper-respondent circuit zones, of the embedded tamper-respondent sensor, along with the tamper-respondent sensor 821, may be electrically connected into monitor or compare circuitry provided, for instance, within secure volume 801 of multilayer circuit board 810. The monitor circuitry may include various bridge or compare circuits, and conventional printed wiring board electrical interconnect inside the secure volume 801, for instance, located within the secure volume defined by the tamper-respondent frames 901 (FIG. 9), and the tamper-respondent mat layers.

Note that advantageously, different tamper-respondent circuit zones on different tamper-respondent layers may be electrically interconnected into, for instance, the same comparator circuit, Wheatstone bridge, or similar monitor circuitry. Thus, any of a large number of interconnect configurations may be possible. For instance, if each of two tamper-respondent mat layers contains 30 tamper-respondent circuit zones, and each of two tamper-respondent frames contains 4 tamper-respondent circuit zones, then, for instance, the resultant 68 tamper-respondent circuit zones may be connected in any configuration within the secure volume to create the desired arrangement of circuit networks within the secure volume being monitored for changes in resistance or tampering. Note in this regard, that the power supply or battery for the tamper-respondent sensor may be located external to the secure volume, with the sensor being configured to trip and destroy any protected or critical data if the power supply or battery is tampered with.

FIG. 11 is a partial enlarged view of the tamper-respondent assembly of FIGS. 8A-9, with a tamper-respondent electronic circuit structure 1100 comprising multiple tamper-respondent sensors 821, 822 disposed on the inner surface 825 of enclosure 820. As illustrated, in one embodiment, enclosure 820 and the inner-sidewall-disposed, tamper-respondent sensor 821 align at the bottom edge and extend into a continuous groove or trench 812 in multilayer circuit board 810 comprising, or associated with, the electronic circuit to be protected, as explained above. Tamper-respondent sensors 821, 822 may overlap, for instance, a few millimeters, or more, in order to provide added tamper-proof protection along the seam, where the tamper-respondent sensors 821, 822 meet within the electronic assembly enclosure 820.

FIG. 12 depicts one example of a process for adhering a tamper-respondent sensor 1200 to the inner surface 825 of enclosure 820. In this example, a single tamper-respondent sensor 1200 replaces the tamper-respondent sensors 821, 822 in the example of FIG. 11. However, the adhering apparatus and approach of FIG. 12 could also be applied to securing multiple tamper-respondent sensors 821, 822 to, for instance, the inner surface of electronic assembly enclosure 820. As illustrated, a bounding fixture 1210 may be used in combination with a first push and clamp mechanism 1211, and a second push and clamp mechanism 1212, to hold the tamper-respondent sensor 1200 in place while an adhesive 1205 cures between the tamper-respondent sensor and inner surface 825 of enclosure 820. Note that, in one or more embodiments, the radius of the tamper-respondent sensor 1200 in the corners of the enclosure can vary to account for tolerances of the flexible tamper-respondent sensor comprising the one or more formed flexible layers.

FIGS. 13A-13C depict one example of a process for adhering tamper-respondent electronic circuit structure 1100 of FIG. 11 to inner surface 825 of electronic enclosure 820. As illustrated in the underside, isometric view of FIG. 13A, inner surface 825 of electronic enclosure 820 includes an inner sidewall surface 1300 and an inner main surface 1301. Tamper-respondent sensor 821, also referred to herein as an inner-sidewall tamper-respondent sensor, may be secured to the inner sidewall surface of enclosure 820 using an adhesive, such as a thermoset adhesive, in combination with an appropriate bonding fixture and push and clamp mechanisms (not shown) to, for instance, align tamper-respondent sensor 821 to the bottom edge of inner sidewall surface 1300.

As depicted in FIG. 13B, in one or more implementations, tamper-respondent sensor 822 may concurrently or subsequently be affixed to main inner surface 1301 (FIG. 13A) of electronic enclosure 820 using a bonding agent such as a thermoset adhesive. Note that in this embodiment, tamper-respondent sensor 822 is sized to overlap, at least in part, tamper-respondent sensor 821 affixed to inner sidewall surface 1300 (FIG. 13A). This overlap is depicted in greater detail in the partial enlargement of an inner corner 1302 of electronic enclosure 820 in FIG. 13C. Advantageously, by providing two or more discrete tamper-respondent sensors, securing of the tamper-respondent electronic circuit structure to an electronic enclosure is facilitated by allowing more flexibility to align a particular sensor to a particular portion of the electronic enclosure, such as to the bottom edge of the inner sidewall surface of electronic enclosure 820, as in the example of FIGS. 13A-13C.

As illustrated in FIG. 13C, inner corner 1302 of electronic enclosure 820 may be shaped with one or more curved portions and one or more flat, angled-sidewall portions to facilitate wrapping of tamper-respondent sensor 821 over inner sidewall surface 1300 (as explained further below). Note further that, within electronic enclosure 820, various tamper-respondent sensor overlap and folding arrangements may be employed, as the case with the external wrapping of sensors about the electronic enclosure depicted in FIGS. 6A-6G. In the embodiment of FIGS. 13A-13C, the connections to the resistive networks of the tamper-respondent sensors 821, 822 may be provided in the region of the overlap, between the sensors, which in the embodiment of FIGS. 8A-10, facilitate defining the secure volume between the electronic enclosure and the multilayer circuit board.

One consideration with a tamper-respondent assembly, and more particularly, a tamper-respondent electronic circuit structure such as described herein, arises from the need to transition the inner-sidewall tamper-respondent sensor through one or more inner-sidewall corners of an electronic enclosure such as described. As noted above, in one or more embodiments, the tamper-respondent electronic circuit structure comprises one or more tamper-respondent sensors, which are adhesively mounted or affixed to the inner surfaces of the electronic enclosure. These inner surfaces include an inner main surface, and an inner sidewall surface having, for instance, at least one inner-sidewall corner. As noted, the tamper-respondent sensor(s) may each be formed of one or more flexible layers having circuit lines on one or more layers which define tamper-detect networks, such as resistive networks, that may be connected to monitor circuitry for detection of intrusion attempts into the secure space defined by the tamper-respondent assembly. During fabrication, the flexible layers of the tamper-respondent sensor(s) could stretch and potentially buckle within one or more inner-sidewall corners of the electronic enclosure as the sensor is mounted to the enclosure. This stretching or buckling within the corner(s) could result in breaking one or more circuit lines defining the tamper-detect networks to be monitored, which would destroy the tamper-respondent assembly for its intended use. Further, any buckling of the tamper-respondent sensor(s) over the inner surface, such as at the inner-sidewall corner(s) of an inner sidewall surface, could result in potential breach points, which would cause the tamper-respondent assembly to fail a NIST FIPS 140-2 Level 4 security test. Described hereinbelow with reference to FIGS. 14A-18 therefore, are various enhancements to tamper-respondent assemblies such as disclosed herein which address this concern.

FIGS. 14A & 14B depict in greater detail one embodiment of an electronic enclosure 1400, similar to enclosure 820 described above in connection with FIGS. 8A-13C. Referring collectively to FIGS. 14A & 14B, in this example, electronic enclosure 1400 includes an inner main surface 1401, which may be substantially flat, and an inner sidewall surface 1402, which in this example joins to inner main surface 1401 via a curved (or radiused) transition region 1403 around the inner perimeter of electronic enclosure 1400. Region 1403 provides a gradual transition between inner sidewall surface 1402 and inner main surface 1401, which in one or more embodiments, may be oriented orthogonal to each other. In the configuration depicted, electronic enclosure 1400 also includes multiple inner-sidewall corners 1410, which may be configured to facilitate transition between adjoining sides of electronic enclosure 1400. By way of example, in the enlarged depiction of FIG. 14B, one inner-sidewall corner 1410 is illustrated, which joins a first side 1404 and a second side 1405 of electronic enclosure 1400. In one or more implementations, each inner-sidewall corner may be similarly configured. In the exemplary embodiment, which is presented by way of example only, inner-sidewall corner 1410 includes a flat, angled-sidewall portion 1411, and first and second curved-sidewall portions 1412, 1413 located at opposite sides of flat, angled-sidewall portion 1411 as shown.

As one example, flat angled-sidewall portion 1411 may be oriented at a 45° angle to the adjoining first side 1404 and second side 1405 of electronic enclosure 1400, which in one or more embodiments may be perpendicular to each other. In one or more implementations, first and second curved sidewall portions 1412, 1413 may have a similar bend radius, which may be, for instance, approximately five times or greater the thickness of the tamper-respondent sensor being mounted to the inner sidewall surface of the electronic enclosure 1400. In the illustrated example, transition region 1403 between inner sidewall surface 1402 and inner main surface 1401 continues within the inner-sidewall corners 1410, where a lower part 1411′ of flat, angled-sidewall portion 1411 curves outward in transition to inner main surface 1401, and lower portions 1412′, 1413′ of first and second curved-sidewall portions 1412, 1413 also further curve outward in transition to inner main surface 1401, as illustrated. Note that the corner configuration of FIGS. 14A & 14B is presented by way of example only, and that the present invention may be used with other corner designs without departing from the concepts disclosed herein. Also, as noted, in one or more implementations, electronic enclosure 1400 may be employed in combination with a multilayer circuit board, such as multilayer circuit board 810 described above in connection with FIGS. 8A-12, to define a secure volume about one or more electronic components or an electronic assembly, for instance, comprising an encryption and/or decryption module and associated memory.

Electronic enclosure 1400 may be fabricated of a variety of materials and have a variety of different configurations. In one or more implementations, the enclosure may be a rigid, thermally conductive enclosure (fabricated, for instance, of a metal material) to facilitate conduction of heat from one or more electronic components within the secure volume defined (at least in part) by the tamper-respondent assembly. Note also that the rectangular configuration of electronic enclosure 1400 could be replaced with any of a variety of different enclosure configurations, any one of which may include one or more inner-sidewall corners configured, by way of example, such as illustrated in FIGS. 14A & 14B.

FIGS. 15A & 15B depict underside, isometric views of a further embodiment of a tamper-respondent assembly employing electronic enclosure 1400. Referring collectively to FIGS. 15A & 15B, in one or more implementations, tamper-respondent assembly 1500 includes electronic enclosure 1400 which, as noted, is to enclose, at least in part, one or more electronic components or an electronic assembly to be protected. Electronic enclosure 1400 includes an inner main surface, and an inner sidewall surface including at least one inner-sidewall corner, such as described above in connection with FIGS. 14A & 14B. Further, tamper-respondent assembly 1500 includes a tamper-respondent electronic circuit structure which includes at least one tamper-respondent sensor mounted to and covering, at least in part, the inner surface(s) of electronic enclosure 1400. As explained further below, the tamper-respondent sensor(s) is configured so as to facilitate good contact, and good adhesion, of the sensor to the inner surfaces of the enclosure, such as, for instance, the one or more inner-sidewall corners of the electronic enclosure 1400, to provide secure coverage of the tamper-respondent sensor(s) over the inner surface(s) of the electronic enclosure.

As illustrated, in one or more implementations, the tamper-respondent electronic circuit structure associated with electronic enclosure 1400 may include an inner-sidewall tamper-respondent sensor 1510 and an inner main surface tamper-respondent sensor 1520, along with a security band 1530. In the illustrated example, inner-sidewall tamper-respondent sensor 1510 may be formed with an integrated flex ribbon cable or extension 1511 to facilitate electrical connection of the at least one resistive network within inner-sidewall tamper-respondent sensor 1510 to appropriate monitor circuitry (not shown) disposed within, for instance, the secure volume defined, at least in part, by the tamper-respondent assembly of FIGS. 15A & 15B. Similarly, inner main surface tamper-respondent sensor 1520 may be configured with an integrated flex ribbon cable or extension 1521 to facilitate electrical connection of inner main surface tamper-respondent sensor 1520 to the monitor circuitry, as well. A bonding agent (not shown), such as a thermoset adhesive, may be employed to adhere inner-sidewall tamper-respondent sensor 1520 to inner sidewall surface 1402 (FIG. 14A) and to inner-sidewall corners 1410 (FIG. 14A). A similar adhesive could be used to adhere inner main surface tamper-respondent sensor 1520 to inner main surface 1401 (FIG. 14A) and to inner-sidewall tamper-respondent sensor 1510 where the sensors overlap. Security band 1530 may further be adhesively secured over the overlap between inner main surface tamper-respondent sensor 1520 and inner-sidewall tamper-respondent sensor 1510 covering, in one or more implementations, transition region 1403 (FIG. 14A) between the inner sidewall surface and the inner main surface around the inner perimeter of electronics enclosure 1400.

Note that, in the example provided in FIGS. 15A & 15B, inner-sidewall tamper-respondent sensor 1510 and inner main surface tamper-respondent sensor 1520 are discrete tamper-respondent sensors that overlap, at least in part, and facilitate defining a secure volume about the at least one electronic component to be protected. For instance, the secure volume may be defined by flipping over and securing the illustrated tamper-respondent assembly of FIGS. 15A & 15B to a multilayer circuit board with an embedded tamper-respondent sensor, such as described above.

FIG. 16A depicts one embodiment of inner-sidewall tamper-respondent sensor 1510 of FIGS. 15A & 15B. In this embodiment, inner-sidewall tamper-respondent sensor 1510 includes at least one first layer 1600 having opposite first and second sides 1601, 1602, and circuit lines 1605 extending substantially over all of the flexible layer, and forming at least one tamper-detect network, such as described herein. For instance, circuit lines 1605 may be disposed on at least one of first side 1601 or second side 1602 of the at least one flexible layer 1600. Note that the at least one flexible layer 1600 may be fabricated as a conventional security sensor layer, or be fabricated as one of the enhanced, tamper-respondent sensors described herein. In particular, although illustrated as a non-formed, flexible layer, the at least one flexible layer 1600 of inner-sidewall tamper-respondent sensor 1510 could comprise a formed flexible layer, such as one of the sensors depicted in FIGS. 4A-5H, or multiple weaved tamper-respondent sensors, such as illustrated in FIGS. 7A-7C. As noted, extension 1511 may extend from inner-sidewall tamper-respondent sensor 1510 to facilitate electrical connection of the at least one resistive network of the inner-sidewall tamper-respondent sensor 1510 to appropriate monitor circuitry (not shown) disposed within, for instance, the secure volume defined, at least in part, by the tamper-respondent assembly of FIGS. 15A & 15B. As illustrated, in one or more implementations, inner-sidewall tamper-respondent sensor 1510 is of sufficient length to encircle the inside of the electronic enclosure, covering the inner sidewall surface thereof, and overlap at its ends. Further, multiple slots 1610 are provided within inner-sidewall tamper-respondent sensor 1510. These multiple slots 1610 are sized and positioned along the inner-sidewall tamper-respondent sensor so as to approximately align (in one or more embodiments) to respective inner-sidewall corners of the electronic enclosure to facilitate good contact, and good adhering, and bending the sensor within the inner-sidewall corners of the electronic enclosure, for instance, by allowing for regions of overlap of the inner-sidewall tamper-respondent sensor on itself.

FIGS. 16B & 16C depict one embodiment of inner-sidewall tamper-respondent sensor 1510 mounted within electronic enclosure 1400. As illustrated, in the exemplary embodiment, the inner-sidewall tamper-respondent sensor includes first and second slots that respectively overlie, at least in part, the first and second curved-sidewall portions 1412, 1413 (FIG. 14B) of the associated inner-sidewall corner 1410 to be covered. These first and second slots are spaced apart to reside at opposite sides of the flat, angled-sidewall portion 1411 (FIG. 14B) of the inner-sidewall corner 1410, and facilitate reducing the amount of material in the corner and thereby enhance good contact and adhesion of the inner-sidewall tamper-respondent sensor 1510 to the inner sidewall surface 1402 (FIG. 14A) of the electronic enclosure, including at the inner-sidewall corners 1410 thereof, while also reducing stress on the sensor within the corner(s). For instance, the multiple slots 1610 allow for overlapping of the inner-sidewall tamper-respondent sensor on itself at the inner-sidewall corners, as illustrated. Note that, in this configuration, the inner-sidewall tamper-respondent sensor 1510 has a width which allows the sensor to cover the transition region 1403 (FIG. 14A), as well as extend over, in part, the inner main surface 1401 of electronic enclosure 1400. Note also that one or more uncovered regions 1615 may result from the presence of the slots when the inner-sidewall tamper-respondent sensor 1510 is wrapped around the inner sidewall surface as shown, exposing portions of the inner sidewall surface at the inner-sidewall corner(s), for instance, along the seams where the inner-sidewall tamper-respondent sensor overlaps at the corner. As explained below, these regions 1615 may be covered or protected by inner main surface tamper-respondent sensor 1520 corner tabs once that sensor and its corner tabs are adhered to the assembly. This is illustrated, by way of example, in FIGS. 17A-17C.

Referring collectively to FIGS. 17A-17C, inner main surface tamper-respondent sensor 1520 includes at least one flexible layer 1700 having opposite first and second sides 1701, 1702, and circuit lines 1705 extending substantially over all of the flexible layer 1700 and forming at least one tamper-detect network, such as described herein. For instance, circuit lines 1705 are disposed on one or both of first side 1701 and second side 1702 of the at least one flexible layer 1700, as described. As noted above, the at least one flexible layer 1700 may be fabricated as a conventional security sensor layer, or be fabricated as one of the enhanced, tamper-respondent sensors described herein. In particular, although illustrated as a non-formed, flexible layer, the at least one flexible layer 1700 of inner main surface tamper-respondent sensor 1520 could comprise a formed flexible layer, such as one or more of the sensors depicted in FIGS. 4A-5H, or multiple weaved tamper-respondent sensors, such as illustrated in FIGS. 7A-7C. As noted, extension 1521 may be formed integral with inner main surface tamper-respondent sensor 1520 to facilitate electrical connection of the at least one associated resistive network to monitor circuitry (not shown) within the secure volume being defined, at least in part, by the tamper-respondent assembly of FIGS. 15A & 15B; for instance, in association with a multilayer circuit board having an embedded tamper-respondent sensor therein, as described above.

In the depicted configuration, multiple corner tabs 1710 are provided, with at least one corner tab 1710 being provided at the at least one inner-sidewall corner. In the exemplary embodiment illustrated, two corner tabs 1710 are provided at each corner of the inner main surface tamper-respondent sensor 1520. These corner tabs 1710 include circuit lines 1705 (FIG. 17A) and are sized to cover a respective one of the uncovered regions 1615 in inner-sidewall tamper-respondent sensor and enclosure assembly which remain after securing inner-sidewall tamper-respondent sensor 1510 to electronic enclosure 1400, as illustrated in FIGS. 16B & 16C. In particular, those skilled in the art should understand that corner tabs 1710 include respective portions of the at least one tamper-detect network provided by inner main surface tamper-respondent sensor 1520, such that if an attempt were made to breach the tamper-respondent assembly 1500 through the underlying, uncovered regions 1615 of the inner sidewall surface, the respective corner tab would be contacted, thereby resulting in detection of the attempted breach.

As noted above in connection with FIGS. 15A & 15B, reinforcement of the overlap between inner-sidewall tamper-respondent sensor 1510 (FIG. 15A) and inner main surface tamper-respondent sensor 1520 (FIG. 15) may be provided, in one or more implementations, by one or more physical security structures, such as security band 1530. One potential point of exposure for a tamper-respondent assembly such as described herein would be at an overlap between two or more tamper-respondent sensors, such as at an overlap between an inner-sidewall tamper-respondent sensor and an inner main surface tamper-respondent sensor. For instance, an attack on a tamper-respondent assembly could entail drilling through the enclosure and chemically attaching an overlapped bond area between two tamper-respondent sensors of the tamper-respondent electronic circuit structure, such as the overlap area where inner main surface tamper-respondent sensor 1520 is adhesively secured over inner-sidewall tamper-respondent sensor 1510. To address this concern, a physical security structure, such as security band 1530, may be provided. Note that security band 1530 is one embodiment only of a physical security structure which could be employed to overlie and physically secure in place, at least in part, one or more tamper-respondent sensors covering one or more inner surfaces of an electronic enclosure, such as described herein.

Generally stated, in one or more implementations, disclosed herein is a tamper-respondent assembly which includes an electronic enclosure to enclose, at least in part, at least one electronic component to be protected, wherein the electronic enclosure includes an inner surface. The tamper-respondent assembly also includes a tamper-respondent electronic circuit structure comprising a tamper-respondent sensor lining and covering, at least in part, the inner surface of the electronic enclosure. The tamper-respondent sensor may include a flexible layer having opposite first and second sides, and circuit lines substantially covering at least one of the first side or the second side of the flexible layer, forming at least one tamper-respondent network, such as described herein. The flexible layer of the tamper-respondent sensor could be a non-formed sensor layer or a formed sensor layer, in accordance with one or more of the sensor layer embodiments described herein.

The tamper-respondent assembly further includes a physical security structure, such as at least one security element, that overlies and physically secures in place, at least in part, the tamper-respondent sensor covering, at least in part, the inner surface of the electronic enclosure. In the embodiment of FIGS. 15A & 15B, security band 1530 is illustrated which includes multiple security elements 1531, as shown in enlarged view in FIG. 18. Note that the security structure, such as security band 1530, could comprise a single element or multiple elements, depending on the desired configuration. In the example of FIGS. 15A, 15B & 18, two substantially identical, U-shaped security elements 1531 are illustrated, by way of example only. In the depicted embodiment, security elements 1531 are spaced apart, with gaps 1532 therebetween. By providing two or more security elements 1531, to define a desired physical security structure (such as security band 1530) manufacturing tolerances may be better accommodated within the tamper-respondent assembly. By way of example, the gaps 1532 between adjacent security elements of the multiple, distinct security elements 1531, may be on the order of several millimeters. Note that although illustrated as two security elements 1531, any number of physical security elements could be provided within the tamper-respondent assembly, and any number of security structures, such as multiple security bands or plates, could be provided within the tamper-respondent assembly as desired to provide additional mechanical securing of the tamper-respondent sensor(s) in place over the inner surface of the electronic enclosure.

In the example of FIGS. 15A, 15B & 18, the physical security structure is configured as a security band or collar comprising multiple distinct security elements 1531 which extends substantially fully around the inner perimeter of the electronic enclosure 1400. The security band 1530 is sized and positioned to overlie and physically secure in place at least the overlap of the inner main surface tamper-respondent sensor and the inner-sidewall tamper-respondent sensor, as illustrated in FIG. 15A. In one or more implementations, security band 1530 may be adhesively secured to the tamper-respondent sensors. Note that in this example, security band 1530, comprising security elements 1531, extends around the inner perimeter, including through the inner-sidewall corners, as illustrated in FIG. 15A. In this manner, security elements 1531 advantageously overlie and secure in place the overlap(s) of the inner-sidewall tamper-respondent sensor and the inner main surface tamper-respondent sensor at the inner-sidewall corners of the electronic enclosure. By way of example, in the embodiment depicted, security band 1530, or more particularly, security elements 1531, overlie and physically secure in place the multiple corner tabs 1710 (FIG. 17C) projecting from the inner main surface tamper-respondent sensor 1520 at the inner-sidewall corners of the electronic enclosure. This advantageously prevents an attack against the tamper-respondent assembly through the areas lined by the multiple corner tabs projecting from the inner main surface of the tamper-respondent sensor. The security band 1530 creates a mechanical barrier that prevents the tamper-respondent sensors from being separated.

In one or more enhanced embodiments, the security element(s) defining the security band, or more generally, the physical security structure, are formed (for instance, by stamping) a metal material, or metal alloy, such as copper, soft stainless steel, etc. Further, the metal security element(s) may advantageously be electrically connected to ground to further enhance detection capabilities of the tamper-respondent assembly. By forming the security element(s) of a metal that is difficult to drill through, then, if an attempt were made to drill through the security element, metal fragments would be created, which potentially could be pulled into the sensor layer(s) lining the inner surface of the electronic enclosure, which would result in a greater chance of shorting or otherwise damaging the circuit lines forming the one or more tamper-respondent networks of the sensor during the attack, and thus enhance detection capability of the tamper-respondent sensor. Further, by electrically grounding the security element(s), then a drill contacting the grounded security element(s) after drilling through one or more tamper-respondent sensors would be more likely to short one or more of the circuit lines forming the at least one tamper-detect network in the associated tamper-respondent sensor(s). By grounding the security element(s), another path for current to flow is established, which advantageously increases the likelihood of detecting an attempt to tamper with the tamper-respondent assembly. Note that grounding of the security element(s) could be by any means, such as by electrically connecting the elements to one or more ground lines on the electronic assembly being protected by the tamper-respondent assembly, or (in certain of the embodiments disclosed herein) by electrically connecting the elements to one or more ground planes within the multilayer circuit board forming, in part, the secure volume about the electronic assembly being protected. In one or more implementations, the security element(s), or more generally, the security band or physical security structure, may be pre-formed (e.g., by stamping) into the desired shape, for example, to accommodate and overlie the overlap between the inner-sidewall tamper-respondent sensor and the inner main surface tamper-respondent sensor, such as depicted in FIG. 15A.

By way of further enhancement, increased tamper-respondent sensor sensitivity and robustness may be provided by laying out the anti-intrusion sensor circuitry using paired conductive lines disposed on the one or more flexible layers of the tamper-respondent sensor, and by implementing monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event. Advantageously, implementing the sensor wiring layout using paired conductive lines and differential monitoring reduces detected resistance differences in the tamper-respondent networks of the sensor due to thermal gradients. This reduction in noise advantageously improves sensitivity to a tamper event. Further, in a multilayer tamper-respondent sensor implementation such as described herein, use of a single set of paired conductive lines or a relatively small number of sets of paired conductive lines per layer of conductive lines, such as eight or less sets, advantageously reduces the amount of interconnect wiring between layers to connect, for instance, different sets of paired conductive lines in different layers of the tamper-respondent sensor together. This advantageously allows for a reduction in the number of interconnect vias and allows for the interconnect vias to be larger in size, thereby facilitating manufacturability and handling, as well as performance robustness of the tamper-respondent sensor. By way of illustration, FIGS. 19A-22C depict examples of tamper-respondent sensor circuit layouts using paired conductive lines and differential monitoring.

Referring to FIG. 19A, one embodiment of a tamper-respondent sensor 1900 sized and configured to wrap around and encircle a six-sided electronic enclosure, such as described above in connection with FIG. 6A, is provided by way of example. Tamper-respondent sensor 1900 includes, for instance, a tamper-detect area 1901, an unfolded interconnect area 1902, and a flex cable extension 1921 with an electrical connector 1922 to facilitate electrical connection of tamper-respondent sensor 1900 to monitor circuitry (not shown) provided, for instance, to differentially monitor the paired conductive lines for a tamper event, such as a change in resistance (and/or inductance and/or capacitance) between matching lines of one set of the paired conductive lines.

As described above in connection with FIGS. 3A-3E, the one or more flexible layers 1910 may comprise, in one or more embodiments, a crystalline polymer material, such as polyvinyldene difluoride (PVDF) or Kapton, or other crystalline polymer material. As noted, crystalline polymer can be made much thinner, while still maintaining structural integrity of the flexible substrate, which advantageously provides greater reliability of the sensor after folding. Paired conductive lines 1911 may be disposed on the first side, the second side or both sides of a flexible layer of the one or more flexible layers 1910 within tamper-respondent sensor 1900. As explained above, in one or more aspects, the circuit lines, and in particular, the paired conductive lines in this example, may be of reduced line width W₁ of, for instance, 200 μm or less, such as less than or equal to 100 μm, or even more particularly, in the range of 30-70 μm. Commensurate with reducing the circuit line width W₁, line-to-line spacing width W_(s) may also be reduced to less than or equal to 200 μm, such as less than or equal to 100 micrometers, or for instance, in a range of 30-70 μm. Advantageously, by reducing the line width W₁ and the line-to-line spacing W_(s) of paired conductive lines 1911 within tamper-respondent sensor 1900, the width and pitch may be made on the same order of magnitude as the smallest intrusion instruments currently available, and therefore, any intrusion attempt would necessarily remove a sufficient amount of one or the other of the paired conductive lines to cause a resistance differential, and thereby the tamper intrusion, to be detected.

As explained above, a variety of materials may be advantageously employed to form the conductive lines. For instance, the conductive lines may be formed of a conductive ink (such as a carbon-loaded conductive ink) printed on to one or both opposite sides of a flexible layer of the one or more flexible layers 1910 in a stack of such layers. Alternatively, a metal or metal alloy could be used to form the circuit lines, such as copper, silver, carbon ink, intrinsically conductive polymers, or nickel phosphorous (NiP), or Omega-Ply®, or Ticer™.

In one or more implementations, paired conductive lines 1911 of tamper-respondent sensor 1900 are electrically connected to define one or more resistive networks. Further, the circuit lines may be fabricated as resistive circuit lines by selecting the line material, line width W₁, and line length L₁ to provide a desired resistance per line. As noted above, in one example, a “resistive circuit line” may comprise a line width of 1000 ohms resistance or greater, end to end. In one specific example, each conductive line may have a line width of 50 μm with a circuit line thickness of 10 μm and a line length L₁ and material selected to achieve the desired resistance. At the dimensions described, good electrical conductors such as copper or silver may also be employed and still form a resistive network due to the fine dimensions noted. Alternatively, materials such as conductive ink or the above-noted Omega-Ply® or Ticer™ may be used to define resistive, paired conductive lines.

In one or more implementations, a single set, or multiple sets, of paired conductive lines may be provided within tamper-detect area 1901 in one layer of conductive lines in tamper-respondent sensor 1900. In one example, each set of paired conductive lines may comprise a first conductive line and a second conductive line, which are provided in a desired pattern as adjacent, matching conductive lines disposed on one side of a flexible layer of the one or more flexible layers. By way of example, FIG. 19A illustrates a paired conductive line set with a serpentine pattern comprising curving transitions at the opposite edges of the tamper-detect area 1901 doubling back and repeating until, for instance, exiting for electrical connection to the monitor circuitry through one or more connect vias 1912 in unfolded interconnect area 1902.

Note that different layers of paired conductive lines may be provided within tamper-respondent sensor 1900. By way of specific example, four layers of conductive lines may be provided each on a respective side of two flexible layers provided in a stack, as described above, or on one side of four flexible layers provided in a stack, etc. For instance, a first layer of paired conductive lines may extend horizontally within tamper-detect area 1901 as illustrated in FIG. 19A, a second layer of paired conductive lines, below the first layer, may extend vertically within tamper-detect area 1901, a third layer of paired conductive lines may again extend horizontally, and a fourth layer may extend vertically. Note that this particular configuration is provided by way of example only, and that any orientation changes or pattern changes between layers could be employed, as desired. In one implementation, the line width W₁ of individual conductive lines within the sets of paired conductive lines may be 50-100 μm, and the line-to-line spacing W_(s) between adjacent paired conductive lines may be in the range of 100-200 μm pitch. As noted, the paired conductive lines may take on any desired pattern and may comprise straight, angled or curving paired conductive lines.

Note that the paired conductive lines described herein comprise two or more adjacently disposed, matching conductive lines in any desired repeating pattern across the tamper-detect area 1901 of tamper-respondent sensor 1900. In one or more embodiments, the paired conductive lines include multiple transitions doubling back from between opposite edges of the tamper-detect area 1901. As one example, one set of paired conductive lines may be self-contained on each wiring layer, with the circuit lines being electrically contacted through contact vias in unfolded interconnect area 1902, and through flex cable 1921. Electrical connection may be to appropriate differential monitor circuitry within the secure volume defined by the tamper-respondent assembly. Connect vias 1912 may be provided within unfolded interconnect area 1902 of tamper-respondent sensor 1900 to electrically contact paired conductive lines in the various layers of the tamper-detect area 1901 in a multilayer paired conductive lines implementation. Further, note that a tamper-detect network may include multiple sets of paired conductive lines disposed on different flexible layers of the tamper-respondent sensor. For instance, if two or more sets of paired conductive lines are electrically connected and are disposed on different flexible layers, then the connect vias 1912 may be employed to electrically connect the multiple sets of paired conductive lines in any desired network configuration for monitoring thereof. One or more embodiments of this are described further below with reference to FIGS. 20A-21B.

Advantageously, in accordance with an implementation such as depicted in FIG. 19A, unfolded interconnect area 1902 is along only one edge of tamper-detect area 1901, and contains any contact vias 1912 to electrically contact and/or connect to different layers of the paired conductive lines in a multilayer paired conductive line implementation. In the depicted example, unfolded interconnect area 1902 is a wiring fan-out region between flex cable extension 1921 and tamper-detect area 1901 of tamper-respondent sensor 1900.

As illustrated in FIG. 19B, unfolded interconnect area 1902 is an unfolded area of the tamper-respondent sensor when the tamper-respondent sensor 1900 is operatively positioned about a six-sided enclosure, in a manner such as described above. Referring to FIG. 19B, fold lines 1930 are depicted with, for instance, the six-sided electronic enclosure (not shown) being placed within central region 1930 of tamper-detect area 1901 and with the left edge of the tamper-respondent sensor comprising unfolded interconnect area 1902 being brought up a left edge of the electronic enclosure and laid flat across the top of the electronic enclosure such that unfolded interconnect area 1902 is flat and contains no fold lines or creases, with any fold lines occurring within the tamper-detect area 1901 of the tamper-respondent sensor. The right edge of tamper-respondent sensor 1900 may then be folded over the right edge of the six-sided electronic enclosure (not shown) and laid over the top of the electronic enclosure, including over the top of unfolded interconnect area 1902, so as to overlap the unfolded interconnect area 1902, essentially making unfolded interconnect area 1902 part of the secure volume defined by the tamper-respondent sensor when operatively positioned about the electronic enclosure in this manner. In particular, note that unfolded interconnect area 1902 is covered by a portion of the tamper-detect area 1901 when the tamper-respondent sensor is in operative position wrapped about the electronic enclosure as described. Further, note that unfolded interconnect area 1902 lies flat on the electronic enclosure and contains no fold creases. This advantageously increases robustness of the tamper-respondent sensor since, as noted above, any connect contacts or vias 1912 are disposed in this example within unfolded interconnect area 1902. FIGS. 22A-22C describe similar concepts as those noted above in connection with FIGS. 19A & 19B, only in a tamper-respondent assembly configuration such as described above in connection with FIGS. 8-18.

As shown in FIGS. 20A & 20B, in one or more implementations, the tamper-respondent assembly may include a first set 2000 and a second set 2010 of paired conductive lines. The first set of paired conductive lines 2000 may include a first conductive line 2001 and a second conductive line 2002 disposed adjacent to each other, and the second set of paired conductive lines 2010 may include a first conductive line 2011 and a second conductive line 2012 also disposed adjacent to each other. These sets of paired conductive lines 2000, 2010 may be disposed on a common layer of conductive lines within the tamper-respondent sensor, or on different layers of conductive lines within the tamper-respondent sensor. Where the first and second sets of paired conductive lines 2000, 2010 are in different layers of conductive lines within the tamper-respondent sensor, interconnect vias 1912 (FIG. 19A) may be employed to electrically connect them in a common tamper-detect network, such as illustrated in FIG. 21A. Note that conductive lines 2001, 2002 are matching conductive lines, and that conductive lines 2011, 2012 are matching conductive lines. Each pair of matching conductive lines may have a common resistance, common length, a common line width and line thickness and be formed of identical conductive material such that the electrical characteristics of the lines match as close as possible. By way of example, in a four conductive layer embodiment such as noted above, the first set of paired conductive lines 2000 may be a first set of horizontally extending paired conductive lines on one layer and the second set of paired conductive lines 2010 may be a second set of horizontally extending paired conductive lines on another layer. Each set of paired conductive lines may occupy an entire wiring layer within the multilayer tamper-respondent sensor, or only a portion of a single wiring layer. The conductive lines may be resistive lines, as noted, and/or resistors may be used to balance the lines or sets of paired conductive lines, for instance, at the monitor sense pins or contacts.

FIG. 21A depicts one example of monitor circuitry coupled to two sets of paired conductive lines 2000, 2010. As shown, first set of paired conductive lines 2000 may be in a first layer 2101 of the tamper-respondent sensor, and second set of paired conductive lines 2010 may be in a second layer 2102 of the tamper-respondent sensor. The sets of paired conductive lines 2000, 2010 are connected between a power supply, such as a battery or bank of batteries provided as part of the tamper-respondent assembly or in association with the tamper-respondent assembly, and ground potential, with the monitor circuitry monitoring for resistance (and/or induction and/or capacitance) differences between conductive lines of the paired conductive lines in the sets of paired conductive lines. Those skilled in the art will note that other monitor circuitry configurations may be employed to, for instance, separately differentially monitor resistance, or other electrical characteristics, between two adjacent conductive lines of a pair of matching conductive lines in one or more circuit layers of the tamper-respondent sensor.

FIG. 21B depicts another schematic example of a tamper-respondent assembly with monitor circuitry coupled to four sets of paired conductive lines 2000, 2000′, 2010, 2010′. The four sets of paired conductive lines may be on the same or different layers of a tamper-respondent sensor 2115, such as the tamper-respondent sensors described herein. Linear driver circuits 2120 and linear receiver circuits 2140 are provided as part of the tamper-respondent electronic circuit structure. Linear driver circuits 2120 and linear receiver circuits 2140 are provided to allow monitor circuitry 2130 to be capable of detecting differences in, for instance, AC signals, DC signals, and/or changes to wiring impedance. In one or more embodiments, linear driver circuits 2120 and linear receiver circuits 2140 are immune to temperature changes, leakage currents, and common mode noise. In the depicted example, conductive lines labeled ‘P’ are lines with non-inverted voltage polarity, and lines with ‘N’ are conductive lines with inverted voltage polarity. As shown, linear driver circuits 2120, monitor circuitry 2130, and linear receiver circuits 2140 are coupled between a supply voltage VDD, and ground. The linear driver circuits and receiver circuits provide, in one or more implementations, different voltages for each one of the sets of paired conductive lines 2000, 2000′, 2010, 2010′.

In one or more implementations, linear driver circuits 2120 may inject DC offsets to the differential wiring pairs, and may be an AC balance circuit. Monitor circuitry 2130 may be, for instance, an inverse DC offset circuit detector, and be an AC balanced receiver, with a high Common-Mode Rejection Ration (CMRR). Linear receiver circuits 2140 may inject DC offset to the differential wiring pairs, and also be an AC balanced circuit. By being AC balanced, the circuitry has the advantageous property of being immune to electrical noise created within the secure volume, as well as outside the secure volume. Note that four sets of paired conductive lines are depicted in FIG. 21B, by way of example only. By providing multiple sets of paired conductors, with different potentials being applied to the conductive lines, security of the tamper-respondent sensor is increased by making it more difficult to decipher. In one or more implementations, two sets of paired conductors could be provided per layer within a multilayer tamper-respondent sensor 2115. Characteristic impedances of the conductive lines are matched by design.

Advantageously, the use of paired conductive lines minimizes resistance thermal drift by allowing the monitor circuitry to take into account differences in temperature across the tamper-detect area resulting, for instance, from temperature differentials within the secure volume produced by one or more electronic components within the secure volume. Note that the comparator or monitor circuitry sensitivity should be precise enough to detect adjacent segment shorting when paired conductive lines are patterned such as depicted herein. In particular, in certain regions of the pattern, the same conductive line may be adjacent to itself, and as such, the conductive line lengths L₁ should be sufficiently long to ensure that the resistance of the conductive line is high enough that a short between two adjacent line segments will be detected. Note also that the number of pairs of conductive lines may vary and be defined, for instance, by specified security requirements. The line pairs may be routed in a desired pattern within a layer or between layers to, for instance, maximize Common-Mode Rejection Ratio (CMRR). Further, note that resistors may be added to the paired conductive lines, for instance, in the unfolded interconnect area of the tamper-respondent sensor to increase resistance of the tamper-detect networks and thereby enhance ability of the monitor circuitry to detect a tamper event due to a resistance change between, for instance, two conductive lines in a set of paired conductive lines.

Referring to FIGS. 22A-22C, another embodiment of a tamper-respondent assembly, in accordance with one or more aspects of the present invention is provided. In this embodiment, an underside, isometric view of a portion of a tamper-respondent assembly 2200 is shown as including electronic enclosure 1400 and an inner sidewall tamper-respondent sensor 1510 and an inner main surface tamper-respondent sensor 1520 configured, in one example, such as described above in connection with FIGS. 14A-18. Briefly, electronic enclosure 1400 may be provided to enclose, at least in part, one or more electronic components or an electronic assembly to be protected. In one or more implementations, electronic enclosure 1400 mounts to a multilayer circuit board with an embedded tamper-respondent sensor, such as described above in connection with FIGS. 8-12, where the multilayer circuit board and embedded tamper-respondent sensor also form part of the tamper-respondent assembly.

As illustrated, inner-sidewall tamper-respondent sensor 1510 may be formed with an integrated flex cable extension 1511 to facilitate electrical connection of the at least one tamper-detect network of inner sidewall tamper-respondent sensor 1510 to appropriate monitor circuitry (not shown) disposed within, for instance, the secure volume defined, at least in part, by the tamper-respondent assembly 2200. Similarly, inner main surface tamper-respondent sensor 1520 may be configured with an integrated flex cable extension 1521 to facilitate electrical connection of inner main surface tamper-respondent sensor 1520 to the monitor circuitry, as well. A bonding agent (not shown) such as a thermoset adhesive (for instance, a thermally conductive epoxy) may be employed to adhere inner sidewall tamper-respondent sensor 1520 to the inner sidewall surface, and a similar adhesive could be used to adhere inner main surface tamper-respondent sensor 1520 to the inner main surface of electronic enclosure 1400, as well as to inner sidewall tamper-respondent sensor 1510 where the sensors overlap. Note that in this example inner sidewall tamper-respondent sensor 1510 and inner main surface tamper-respondent 1520 are discreet tamper-respondent sensors that overlap, at least in part, and facilitate defining a secure volume about the at least one electronic component to be protected. For instance, the secure volume may be defined by inverting the tamper-respondent assembly 2200 of FIG. 22A and securing the tamper-respondent assembly to a multilayer circuit board with an embedded tamper-respondent sensor, such as described above.

In one or more implementations, inner-sidewall tamper-respondent sensor 1510 and inner main surface tamper-respondent sensor 1520 each comprise paired conductive lines in respective tamper-detect areas in a manner similar to that described above in connection with the tamper-respondent sensor of FIG. 19A. Additionally, each tamper-respondent sensor includes an unfolded interconnect area 1513, 1523 which may include multiple connect contacts or vias, as well as fan-out circuitry between input output wiring and the fine pitch wiring of the paired conductive lines in the tamper-detect areas of the tamper-respondent sensors. In the embodiment depicted in FIG. 22A, inner-sidewall tamper-respondent sensor 1510 includes unfolded interconnect area 1513 disposed between its tamper-detect area, wrapping around the inner-sidewall of the electronic enclosure 1400, and flex cable extension 1511; and inner main surface tamper-respondent sensor 1520 includes unfolded interconnect area 1523 disposed between its tamper-detect area overlying the inner main surface of the electronic enclosure 1400, and the input output lines of flex cable extension 1521.

FIG. 22B depicts an enlarged view of one embodiment of inner-sidewall tamper-respondent sensor 1510, in one or more aspects of the present invention. As illustrated, inner-sidewall tamper-respondent sensor 1510 may include a tamper-detect area 2201, as well as unfolded inner connect area 1513, and flex cable extension 1511. As noted, flex cable extension 1511 facilitates electrical connection of tamper-respondent sensor 1510 to monitor circuitry (not shown) provided to differentially monitor the pair(s) of conductive lines for a tamper event, such as a change of resistance between matching lines of one set of paired conductive lines.

As described above, the tamper-respondent sensor may include one or more flexible layers, comprising, for instance, crystal polymer material. One or more of the flexible layers may support one or more layers of conductive lines, and in particular, one or more layers of paired conductive lines, such as described herein. As with the embodiment described above in connection with FIGS. 19A &19B, in one or more embodiments, the paired conductive lines may be of reduced line widths W₁ of, for instance, 200 μm or less, such as less than or equal to 100 or more particularly, in the range of 30-70 μm. Commensurate with reducing circuit line width W₁, line-to-line spacing width W_(s) may also be reduced to less than 200 such as less than or equal to 100 or for instance, the range of 30-70 μm. As explained above, a variety of materials may be employed to form the conductive lines. For instance, the conductive lines may be formed of a conductive ink (such a carbon-loaded conductive ink), printed onto one or both sides of a flexible layer of the one or more flexible layers in a stack of such layers. Alternatively, or additionally, a metal or metal alloy could be used to form the circuit lines, for instance, within tamper-detect area 2201.

In one or more implementations, a first set of paired conductive lines 1511 are provided in one layer, and a second set of paired conductive lines 1511′ are provided in another layer. The paired conductive lines 1511, 1511′ may be electrically connected to define one or more tamper-detect networks. Further, the circuit lines may be formed as resistance circuit lines by selecting line material, line width W₁, and line length L₁ to provide a desired resistance per line. As explained above, each set of paired conductive lines may comprise a first conductive line and a second conductive line provided in a desired pattern as adjacent, matching conductive lines disposed, for instance, on one side of a flexible layer of the one or more flexible layers of inner-sidewall tamper-respondent sensor 1510. By way of example, FIG. 22B illustrates a serpentine pattern with curving transitions at the opposite edges of tamper-detect area 2201 doubling back and repeating until, for instance, exiting for electrical connection to the monitor circuitry through one or more connect vias or contacts 1512 in unfolded interconnect area 1513.

As illustrated in FIG. 22B, different layers of paired conductive lines may be provided within tamper-respondent sensor 1510. By way of specific example, two or four layers of conductive lines may be provided, each on a respective side of one or more flexible layers provided in a stack, as described above. For instance, a first layer of paired conductive lines 1511 may extend horizontally within tamper-detect area 2201 as illustrated in FIG. 22A, and a second layer of paired conductive lines 1511′, below the first layer, may extend vertically within tamper-detect area 2201. Additional layers of paired conductive lines may be provided in an alternating pattern, or in any desired pattern, as required for a particular security level. Again, note that the configuration depicted is provided by way of example only, and that other orientation changes or pattern changes between layers could be employed as desired. In one implementation, the line width W₁ of individual conductive lines within the sets of paired conductive lines may be 50-100 μm, and the line-to-line spacing W_(s) between the adjacent paired conductive lines may be in the range of 100-200 μm pitch. A pair of conductive lines may take on any desired pattern, and may comprise straight, angle or curving paired conductive lines.

Note that the paired conductive lines described herein comprise two or more adjacently disposed and matching conductive lines in a desired repeating pattern across tamper-detect area 2201 of inner-sidewall tamper-respondent sensor 1510. In one or more embodiments, the paired conductive lines include multiple transitions doubling back between opposite edges of tamper-detect area 2201. As explained above, one set of paired conductive lines may be self-contained in each wiring layer, with the circuit lines being electrically connected in unfolded interconnect area 1513 and flex cable extension 1511 to appropriate differential monitor circuitry (not shown), disposed, for instance, within the secured volume defined by the tamper-respondent assembly. Connect vias 1512 may be provided within unfolded interconnect area 1513 of tamper-respondent sensor 1510 to electrically contact the paired conductive lines in the various layers of the tamper-detect area 2201 in a multilayer paired conductive lines implementation. Further, note that a tamper-detect network may include multiple sets of paired conductive lines disposed on different flexible layers of the tamper-respondent sensor. For instance, if two or more sets of paired conductive lines are disposed in different flexible layers, then connect vias 1512 may be employed to electrically connect the multiple sets of paired conductive lines in any desired network configuration for monitoring thereof, such as described above in connection with FIGS. 20A-21B.

Advantageously, in accordance with an implementation such as depicted in FIG. 22B, unfolded interconnect area 1513 is along only one edge of tamper-detect area 2201, and contains any contact vias 1512 to electrically contact or interconnect different layers of the paired conductive lines in a multiple-layer, paired conductive line implementation. In the depicted example, unfolded interconnect area 1513 is a wiring fan-out region disposed between flex cable extension 1511 and the fine pitch wiring in tamper-detect area 2201 of tamper-respondent sensor 1510.

Note that in one or more implementations, when inner-sidewall tamper-respondent sensor 1510 is wrapped around the inner sidewall surface of electronic enclosure 1400 (FIG. 22A) unfolded interconnect area 1513 overlies a portion of tamper-detect area 1513 along the inner-sidewall of the electronic enclosure. As such, unfolded interconnect area 2202 is within the secure volume defined by the tamper-respondent assembly when the electronic enclosure is operably coupled to a multilayer circuit board, such as described above.

FIG. 22C depicts one embodiment of inner main surface tamper-respondent sensor 1520. By way of example, inner main surface tamper-respondent sensor 1520 includes a tamper-detect area 2211, an unfolded interconnect area 1523, and flex cable extension 1521, with unfolded interconnect area 1523 being shown in a fan-out region of the wiring between tamper-detect area 2211 and flex cable extension 1521. The materials of the flexible layers and conductive lines within tamper-detect area 2211 may be implemented as described above in connection with, for instance, the embodiments of FIGS. 19A & 22B.

In or more implementations, the conductive lines within tamper-detect area 2211 comprise paired conductive lines. For instance, a single set, or multiple sets, of paired conductive lines may be provided within tamper-detect area 2211. In one example, each set of paired conductive lines may comprise a first conductive line and a second conductive line which are provided in any desired pattern as adjacent, matching conductive lines disposed on a flexible layer of the tamper-respondent sensor. By way of example, FIG. 22C illustrates first and second layers of paired conductive lines, with one layer of conductive lines extending vertically, and another layer extending horizontally, and with each pair of conductive lines being laid out in serpentine patterns with curving transitions at opposites edges of tamper-detect area 2211 doubling back and repeating until, for instance, exiting for electrical connection to the monitor circuitry through one or more contact vias 1522 within unfolded interconnect area 1523 of inner main surface tamper-respondent sensor 1520.

Advantageously, in accordance with the implementation of FIG. 22C, unfolded interconnect area 1523 comprising electrical contact vias 1522 along only one edge of tamper-detect area 2211, and contain any contact vias 1522 to electrically contact and/or connect the conductive lines in the different layers of the paired conductive lines. In the depicted example, unfolded interconnect area 1523 is a wiring fan-out region between flex cable extension 1521 and tamper-detect area 2211 of inner main surface tamper-respondent sensor 1520. As illustrated in FIG. 22A, unfolded interconnect area 1523 is an unfolded area of the tamper-respondent sensor when the inner main surface tamper-respondent sensor is operatively positioned over a main inner surface of the electronic enclosure 1400, and overlaps inner-sidewall tamper-respondent sensor 1510, as illustrated. In this manner, unfolded interconnect area 1523 of inner main surface tamper-respondent sensor 1520 is in the secure volume defined by the tamper-respondent assembly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprise” (and any form of comprise, such as “comprises” and “comprising”), “have” (and any form of have, such as “has” and “having”), “include” (and any form of include, such as “includes” and “including”), and “contain” (and any form contain, such as “contains” and “containing”) are open-ended linking verbs. As a result, a method or device that “comprises”, “has”, “includes” or “contains” one or more steps or elements possesses those one or more steps or elements, but is not limited to possessing only those one or more steps or elements. Likewise, a step of a method or an element of a device that “comprises”, “has”, “includes” or “contains” one or more features possesses those one or more features, but is not limited to possessing only those one or more features. Furthermore, a device or structure that is configured in a certain way is configured in at least that way, but may also be configured in ways that are not listed.

The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below, if any, are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of one or more aspects of the invention and the practical application, and to enable others of ordinary skill in the art to understand one or more aspects of the invention for various embodiments with various modifications as are suited to the particular use contemplated. 

What is claimed is:
 1. A method of fabricating a tamper-respondent assembly, the method comprising: providing a tamper-respondent electronic circuit structure, the providing of the tamper-respondent electronic circuit structure comprising: providing a tamper-respondent sensor, the providing of the tamper-respondent sensor including: providing at least one flexible layer; and providing paired conductive lines disposed on the at least one flexible layer to form, at least in part, at least one tamper-detect network of the tamper-respondent sensor; and providing monitor circuitry electrically connected to the paired conductive lines to differentially monitor the paired conductive lines for a tamper event.
 2. The method of claim 1, wherein the paired conductive lines are disposed on the at least one flexible layer in a serpentine pattern, and one pair of the paired conductive lines comprises a first conductive line and a second conductive line, the first and second conductive lines being adjacent, matching conductive lines disposed on the at least one flexible layer in the serpentine pattern.
 3. The method of claim 2, wherein the first and second conductive lines each have a line width W₁≦200 μm, and a line-to-line spacing width W_(s)≦200 μm.
 4. The method of claim 1, wherein the paired conductive lines comprise multiple sets of paired conductive lines disposed on the at least one flexible layer.
 5. The method of claim 4, wherein the paired conductive lines comprise at least two layers of paired conductive lines disposed on the at least one flexible layer of the tamper-respondent sensor.
 6. The method of claim 5, wherein a first set of paired conductive lines forms at least part of a first layer of paired conductive lines of the at least two layers of paired conductive lines, and a second set of paired conductive lines forms at least part of a second layer of paired conductive lines of the at last two layers of paired conductive lines, the first and second sets of paired conductive lines each comprising matching conductive lines.
 7. The method of claim 6, wherein the first set of paired conductive lines and the second set of paired conductive lines are each disposed in respective serpentine patterns on the least one flexible layer, the respective serpentine patterns of the first and second layers of paired conductive lines being oriented in different directions.
 8. The method of claim 1, wherein the paired conductive lines comprise at least two layers of paired conductive lines disposed on the at least one flexible layer of the tamper-respondent sensor, and the tamper-respondent sensor further comprises multiple interconnect vias electrically connected to the at least two layers of paired conductive lines, the multiple interconnect vias being disposed in an unfolded interconnect area of the tamper-respondent sensor when the tamper-respondent sensor is operatively positioned about at least one electronic component to be protected.
 9. The method of claim 8, wherein the unfolded interconnect area of the tamper-respondent sensor comprises a fan-out region of the paired conductive lines between an interconnect flex cable of the tamper-respondent sensor and a tamper-detect area of the tamper-respondent sensor.
 10. The method of claim 8, further comprising providing an electronic enclosure, the electronic enclosure enclosing, at least in part, the at least one electronic component to be protected, and wherein the providing the tamper-respondent sensor comprises coupling the tamper-respondent sensor to the electronic enclosure to facilitate defining a secure volume about the at least one electronic component to be protected.
 11. The method of claim 10, wherein the tamper-respondent sensor wraps around the electronic enclosure, and the unfolded interconnect area of the tamper-respondent sensor is an overlapped area of the tamper-respondent sensor when the tamper-respondent sensor is, in operative position, wrapped over the electronic enclosure.
 12. The method of claim 10, wherein the tamper-respondent sensor is a first tamper-respondent sensor, and the tamper-respondent electronic circuit structure further comprises a second tamper-respondent sensor, the first tamper-respondent sensor and the second tamper-respondent sensor being coupled to and covering, at least in part, an inner surface of the electronic enclosure to facilitate defining the secure volume about the at least one electronic component to be protected, the unfolded interconnect area of the tamper-respondent sensor being an overlapped area of the first tamper-respondent sensor when the first and second tamper-respondent sensors are coupled to the inner surface of the electronic enclosure. 